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an uart module for fpga using RS232 protocol (no check digit). Used for ELEC5552 design project

Verilog 6 1 Updated Jun 27, 2021

A little anomalous score tool for audio files, created in my postgrad research project

Python 3 1 Updated Jul 26, 2021

A set of audio processing functions implemented by FPGA

Verilog 29 2 Updated Sep 28, 2021