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env: add spdk_pci_id->class_id
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This follows struct rte_pci_id which had class_id as well.
We'll need it to make some additional DPDK APIs public through
the env abstraction.

Change-Id: I794a6cd6b17e48daf53b48fa5abe3d3dcfeaa403
Signed-off-by: Darek Stojaczyk <[email protected]>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/3182
Reviewed-by: Jacek Kalwas <[email protected]>
Reviewed-by: Jim Harris <[email protected]>
Reviewed-by: Ben Walker <[email protected]>
Community-CI: Mellanox Build Bot
Tested-by: SPDK CI Jenkins <[email protected]>
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@darsto @jimharris
darsto authored and jimharris committed Jul 23, 2020
1 parent e8e46cb commit 45528bf
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Showing 6 changed files with 24 additions and 18 deletions.
9 changes: 5 additions & 4 deletions include/spdk/env.h
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Expand Up @@ -645,10 +645,11 @@ struct spdk_pci_addr {
};

struct spdk_pci_id {
uint16_t vendor_id;
uint16_t device_id;
uint16_t subvendor_id;
uint16_t subdevice_id;
uint32_t class_id; /**< Class ID or SPDK_PCI_CLASS_ANY_ID. */
uint16_t vendor_id; /**< Vendor ID or SPDK_PCI_ANY_ID. */
uint16_t device_id; /**< Device ID or SPDK_PCI_ANY_ID. */
uint16_t subvendor_id; /**< Subsystem vendor ID or SPDK_PCI_ANY_ID. */
uint16_t subdevice_id; /**< Subsystem device ID or SPDK_PCI_ANY_ID. */
};

struct spdk_pci_device {
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1 change: 1 addition & 0 deletions include/spdk/pci_ids.h
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Expand Up @@ -53,6 +53,7 @@ extern "C" {
#define SPDK_PCI_VID_CNEXLABS 0x1d1d
#define SPDK_PCI_VID_VMWARE 0x15ad

#define SPDK_PCI_CLASS_ANY_ID 0xffffff
/**
* PCI class code for NVMe devices.
*
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1 change: 1 addition & 0 deletions lib/env_dpdk/pci.c
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Expand Up @@ -313,6 +313,7 @@ pci_device_init(struct rte_pci_driver *_drv,
dev->addr.bus = _dev->addr.bus;
dev->addr.dev = _dev->addr.devid;
dev->addr.func = _dev->addr.function;
dev->id.class_id = _dev->id.class_id;
dev->id.vendor_id = _dev->id.vendor_id;
dev->id.device_id = _dev->id.device_id;
dev->id.subvendor_id = _dev->id.subsystem_vendor_id;
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29 changes: 15 additions & 14 deletions lib/nvme/nvme_quirks.c
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Expand Up @@ -39,71 +39,72 @@ struct nvme_quirk {
};

static const struct nvme_quirk nvme_quirks[] = {
{ {SPDK_PCI_VID_INTEL, 0x0953, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0953, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_INTEL_QUIRK_READ_LATENCY |
NVME_INTEL_QUIRK_WRITE_LATENCY |
NVME_INTEL_QUIRK_STRIPING |
NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
NVME_QUIRK_DELAY_BEFORE_INIT |
NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
},
{ {SPDK_PCI_VID_INTEL, 0x0A53, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A53, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_INTEL_QUIRK_READ_LATENCY |
NVME_INTEL_QUIRK_WRITE_LATENCY |
NVME_INTEL_QUIRK_STRIPING |
NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
NVME_QUIRK_DELAY_BEFORE_INIT |
NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
},
{ {SPDK_PCI_VID_INTEL, 0x0A54, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A54, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_INTEL_QUIRK_READ_LATENCY |
NVME_INTEL_QUIRK_WRITE_LATENCY |
NVME_INTEL_QUIRK_STRIPING |
NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
},
{ {SPDK_PCI_VID_INTEL, 0x0A55, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x0A55, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_INTEL_QUIRK_READ_LATENCY |
NVME_INTEL_QUIRK_WRITE_LATENCY |
NVME_INTEL_QUIRK_STRIPING |
NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
},
{ {SPDK_PCI_VID_MEMBLAZE, 0x0540, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_MEMBLAZE, 0x0540, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_DELAY_BEFORE_CHK_RDY
},
{ {SPDK_PCI_VID_SAMSUNG, 0xa821, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_SAMSUNG, 0xa821, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_DELAY_BEFORE_CHK_RDY
},
{ {SPDK_PCI_VID_SAMSUNG, 0xa822, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_SAMSUNG, 0xa822, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_DELAY_BEFORE_CHK_RDY
},
{ {SPDK_PCI_VID_VIRTUALBOX, 0x4e56, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_VIRTUALBOX, 0x4e56, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC
},
{ {SPDK_PCI_VID_INTEL, 0x5845, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x5845, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_IDENTIFY_CNS |
NVME_INTEL_QUIRK_NO_LOG_PAGES |
NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH
},
{ {SPDK_PCI_VID_CNEXLABS, 0x1f1f, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_CNEXLABS, 0x1f1f, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_IDENTIFY_CNS |
NVME_QUIRK_OCSSD
},
{ {SPDK_PCI_VID_VMWARE, 0x07f0, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_VMWARE, 0x07f0, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_SHST_COMPLETE
},
{ {SPDK_PCI_VID_INTEL, 0x2700, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
{ {SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_INTEL, 0x2700, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
NVME_QUIRK_OACS_SECURITY
},
{ {0x0000, 0x0000, 0x0000, 0x0000}, 0}
{ {0x000000, 0x0000, 0x0000, 0x0000, 0x0000}, 0}
};

/* Compare each field. SPDK_PCI_ANY_ID in s1 matches everything */
static bool
pci_id_match(const struct spdk_pci_id *s1, const struct spdk_pci_id *s2)
{
if ((s1->vendor_id == SPDK_PCI_ANY_ID || s1->vendor_id == s2->vendor_id) &&
if ((s1->class_id == SPDK_PCI_CLASS_ANY_ID || s1->class_id == s2->class_id) &&
(s1->vendor_id == SPDK_PCI_ANY_ID || s1->vendor_id == s2->vendor_id) &&
(s1->device_id == SPDK_PCI_ANY_ID || s1->device_id == s2->device_id) &&
(s1->subvendor_id == SPDK_PCI_ANY_ID || s1->subvendor_id == s2->subvendor_id) &&
(s1->subdevice_id == SPDK_PCI_ANY_ID || s1->subdevice_id == s2->subdevice_id)) {
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1 change: 1 addition & 0 deletions test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
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Expand Up @@ -1516,6 +1516,7 @@ test_nvme_ctrlr_construct_intel_support_log_page_list(void)
CU_ASSERT(res == false);

/* Set the vendor to Intel, but provide no device id */
pci_id.class_id = SPDK_PCI_CLASS_NVME;
ctrlr.cdata.vid = pci_id.vendor_id = SPDK_PCI_VID_INTEL;
payload.temperature_statistics_log_len = 1;
ctrlr.quirks = nvme_get_quirks(&pci_id);
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1 change: 1 addition & 0 deletions test/unit/lib/nvme/nvme_quirks.c/nvme_quirks_ut.c
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Expand Up @@ -48,6 +48,7 @@ test_nvme_quirks_striping(void)
CU_ASSERT((quirks & NVME_INTEL_QUIRK_STRIPING) == 0);

/* Set the vendor id to Intel, but no device id. No striping. */
pci_id.class_id = SPDK_PCI_CLASS_NVME;
pci_id.vendor_id = SPDK_PCI_VID_INTEL;
quirks = nvme_get_quirks(&pci_id);
CU_ASSERT((quirks & NVME_INTEL_QUIRK_STRIPING) == 0);
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