Popular repositories Loading

1. OpenLane OpenLane Public

   Forked from The-OpenROAD-Project/OpenLane

   OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

   Verilog

2. lambda-tensorflow-benchmark lambda-tensorflow-benchmark Public

   Forked from LambdaColdStorage/lambda-tensorflow-benchmark

   Shell

3. vsdflow vsdflow Public

   Forked from kunalg123/vsdflow

   VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using…

   Verilog

4. sky130RTLDesignAndSynthesisWorkshop sky130RTLDesignAndSynthesisWorkshop Public

   Forked from kunalg123/sky130RTLDesignAndSynthesisWorkshop

   Verilog