Generate Wasm SIMD and Wasm Relaxed SIMD F32 DWCONV microkernels

For Wasm SIMD, generate x86 and arm variant. For Wasm Relaxed SIMD, generate FMA and non-fma variant.

Also generate microkernels without activation (similar to unipass).

PiperOrigin-RevId: 494004921

BUILD.bazel

@@ -7015,10 +7015,10 @@ xnnpack_unit_test(
 )
 
 xnnpack_unit_test(
-    name = "f32_dwconv_unipass_minmax_test",
+    name = "f32_dwconv_multipass_test",
     srcs = [
         "test/dwconv-microkernel-tester.h",
-        "test/f32-dwconv-unipass-minmax.cc",
+        "test/f32-dwconv-multipass.cc",
     ],
     shard_count = 5,
     deps = MICROKERNEL_TEST_DEPS + [
@@ -7040,6 +7040,19 @@ xnnpack_unit_test(
     ],
 )
 
+xnnpack_unit_test(
+    name = "f32_dwconv_unipass_minmax_test",
+    srcs = [
+        "test/dwconv-microkernel-tester.h",
+        "test/f32-dwconv-unipass-minmax.cc",
+    ],
+    shard_count = 5,
+    deps = MICROKERNEL_TEST_DEPS + [
+        ":packing",
+        ":microkernel_utils",
+    ],
+)
+
 xnnpack_unit_test(
     name = "f16_dwconv2d_chw_test",
     srcs = [

CMakeLists.txt

@@ -2905,30 +2905,36 @@ IF(XNNPACK_BUILD_TESTS)
   TARGET_LINK_LIBRARIES(f32-conv-hwc2chw-test PRIVATE hardware-config logging microkernels-all microparams-init packing)
   ADD_TEST(NAME f32-conv-hwc2chw-test COMMAND f32-conv-hwc2chw-test)
 
-  ADD_EXECUTABLE(f32-dwconv-unipass-test test/f32-dwconv-unipass.cc)
-  TARGET_INCLUDE_DIRECTORIES(f32-dwconv-unipass-test PRIVATE include src test)
-  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-test PRIVATE fp16 pthreadpool gtest gtest_main)
-  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-test PRIVATE hardware-config logging microkernels-all microparams-init packing)
-  ADD_TEST(NAME f32-dwconv-unipass-test COMMAND f32-dwconv-unipass-test)
-
   ADD_EXECUTABLE(f32-dwconv2d-chw-test test/f32-dwconv2d-chw.cc)
   TARGET_INCLUDE_DIRECTORIES(f32-dwconv2d-chw-test PRIVATE include src test)
   TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE fp16 pthreadpool gtest gtest_main)
   TARGET_LINK_LIBRARIES(f32-dwconv2d-chw-test PRIVATE hardware-config logging microkernels-all microparams-init)
   ADD_TEST(NAME f32-dwconv2d-chw-test COMMAND f32-dwconv2d-chw-test)
 
-  ADD_EXECUTABLE(f32-dwconv-unipass-minmax-test test/f32-dwconv-unipass-minmax.cc)
-  TARGET_INCLUDE_DIRECTORIES(f32-dwconv-unipass-minmax-test PRIVATE include src test)
-  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-minmax-test PRIVATE fp16 pthreadpool gtest gtest_main)
-  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-minmax-test PRIVATE hardware-config logging microkernels-all microparams-init packing)
-  ADD_TEST(NAME f32-dwconv-unipass-minmax-test COMMAND f32-dwconv-unipass-minmax-test)
+  ADD_EXECUTABLE(f32-dwconv-multipass-test test/f32-dwconv-multipass.cc)
+  TARGET_INCLUDE_DIRECTORIES(f32-dwconv-multipass-test PRIVATE include src test)
+  TARGET_LINK_LIBRARIES(f32-dwconv-multipass-test PRIVATE fp16 pthreadpool gtest gtest_main)
+  TARGET_LINK_LIBRARIES(f32-dwconv-multipass-test PRIVATE hardware-config logging microkernel-utils microkernels-all microparams-init packing)
+  ADD_TEST(NAME f32-dwconv-multipass-test COMMAND f32-dwconv-multipass-test)
 
   ADD_EXECUTABLE(f32-dwconv-multipass-minmax-test test/f32-dwconv-multipass-minmax.cc)
   TARGET_INCLUDE_DIRECTORIES(f32-dwconv-multipass-minmax-test PRIVATE include src test)
   TARGET_LINK_LIBRARIES(f32-dwconv-multipass-minmax-test PRIVATE fp16 pthreadpool gtest gtest_main)
   TARGET_LINK_LIBRARIES(f32-dwconv-multipass-minmax-test PRIVATE hardware-config logging microkernel-utils microkernels-all microparams-init packing)
   ADD_TEST(NAME f32-dwconv-multipass-minmax-test COMMAND f32-dwconv-multipass-minmax-test)
 
+  ADD_EXECUTABLE(f32-dwconv-unipass-test test/f32-dwconv-unipass.cc)
+  TARGET_INCLUDE_DIRECTORIES(f32-dwconv-unipass-test PRIVATE include src test)
+  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-test PRIVATE fp16 pthreadpool gtest gtest_main)
+  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-test PRIVATE hardware-config logging microkernels-all microparams-init packing)
+  ADD_TEST(NAME f32-dwconv-unipass-test COMMAND f32-dwconv-unipass-test)
+
+  ADD_EXECUTABLE(f32-dwconv-unipass-minmax-test test/f32-dwconv-unipass-minmax.cc)
+  TARGET_INCLUDE_DIRECTORIES(f32-dwconv-unipass-minmax-test PRIVATE include src test)
+  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-minmax-test PRIVATE fp16 pthreadpool gtest gtest_main)
+  TARGET_LINK_LIBRARIES(f32-dwconv-unipass-minmax-test PRIVATE hardware-config logging microkernels-all microparams-init packing)
+  ADD_TEST(NAME f32-dwconv-unipass-minmax-test COMMAND f32-dwconv-unipass-minmax-test)
+
   ADD_EXECUTABLE(f32-f16-vcvt-test test/f32-f16-vcvt.cc)
   TARGET_INCLUDE_DIRECTORIES(f32-f16-vcvt-test PRIVATE include src test)
   TARGET_LINK_LIBRARIES(f32-f16-vcvt-test PRIVATE fp16 pthreadpool gtest gtest_main)

cmake/microkernels.cmake

@@ -5529,6 +5529,24 @@ SET(ALL_WASMRELAXEDSIMD_MICROKERNEL_SRCS
   src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x16.c
   src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x24.c
   src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x32.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-fma.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmrelaxedsimd-fma.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-fma.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmrelaxedsimd-fma.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-fma.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmrelaxedsimd-fma-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmrelaxedsimd-fma.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-acc2.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-fma-acc2.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-fma.c
@@ -6017,6 +6035,24 @@ SET(ALL_WASMSIMD_MICROKERNEL_SRCS
   src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c
   src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c
   src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-arm-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-arm.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-x86-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-x86.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmsimd.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-arm-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-arm.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-x86-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-x86.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmsimd.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-arm-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-arm.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-x86-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-x86.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmsimd-acc2.c
+  src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmsimd.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-arm-acc2.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-arm.c
   src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-x86-acc2.c

google3/third_party/XNNPACK/microkernels.bzl

@@ -5552,6 +5552,24 @@ ALL_WASMRELAXEDSIMD_MICROKERNEL_SRCS = [
     "src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x16.c",
     "src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x24.c",
     "src/f16-f32-vcvt/gen/f16-f32-vcvt-wasmrelaxedsimd-int32-x32.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd-fma.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmrelaxedsimd.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmrelaxedsimd-fma.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd-fma.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmrelaxedsimd.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmrelaxedsimd-fma.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd-fma.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmrelaxedsimd.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmrelaxedsimd-fma-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmrelaxedsimd-fma.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-acc2.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-fma-acc2.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmrelaxedsimd-fma.c",
@@ -6041,6 +6059,24 @@ ALL_WASMSIMD_MICROKERNEL_SRCS = [
     "src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
     "src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
     "src/f32-dwconv2d-chw/gen/f32-dwconv2d-chw-5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-arm-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-arm.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-x86-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-minmax-wasmsimd-x86.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l4c4s4r-wasmsimd.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-arm-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-arm.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-x86-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-minmax-wasmsimd-x86.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l8c4s4r-wasmsimd.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-arm-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-arm.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-x86-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-minmax-wasmsimd-x86.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmsimd-acc2.c",
+    "src/f32-dwconv/gen/f32-dwconv-2f2m2l16c4s4r-wasmsimd.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-arm-acc2.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-arm.c",
     "src/f32-dwconv/gen/f32-dwconv-3p4c-minmax-wasmsimd-x86-acc2.c",