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Update README.md
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LeiWang1999 authored Mar 16, 2021
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- [米联客](https://www.uisrc.com/portal.php)
- [opencores 开源硬件IP站](https://opencores.org/)
- [FPGA FOR FUN](https://www.fpga4fun.com/CrossClockDomain.html)
- [HDLBits](https://hdlbits.01xz.net/wiki/Main_Page)

<h3 id="github">每个人都应该会使用GitHub</h3>

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<h3>优秀开源项目 - 初级</h3>

- [Verilog Practice](https://github.com/xiaop1/Verilog-Practice)
- Verilog训练

- [带闹钟功能的计数器](https://github.com/LeiWang1999/DigitalAlarmClock)
- 板卡:`Nexys4 DDR`
- 功能
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