video/drm: dsi: Bypass TLP clock lane and data lanes counter threshold

Change-Id: I2b750800859626f3d95ebe6b1b8a3d86aefc07d1 Signed-off-by: Wyon Bi <[email protected]> (sync from rk/kernel:develop-4.4:3ef4c2204f9be3f0877333b5d35ab11e322ed90d)
ROCKPro64 · Jan 25, 2019 · cef5be6 · cef5be6
1 parent 2612c82
commit cef5be6
Showing 1 changed file with 7 additions and 2 deletions.
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -510,8 +510,8 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
 		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
 	};
-	u8 hsfreqrange;
-	unsigned int index;
+	u8 hsfreqrange, counter;
+	unsigned int index, txbyteclkhs;
 	u16 n, m;
 
 	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
@@ -524,6 +524,11 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
 	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
+	txbyteclkhs = dsi->lane_mbps >> 3;
+	counter = txbyteclkhs * 60 / NSEC_PER_USEC;
+	testif_write(dsi, 0x60, 0x80 | counter);
+	testif_write(dsi, 0x70, 0x80 | counter);
+
 	n = dsi->dphy.input_div - 1;
 	m = dsi->dphy.feedback_div - 1;
 	testif_write(dsi, 0x19, 0x30);