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Commits on Oct 8, 2019

• AMDGPU: Propagate undef flag during pre-RA exec mask optimizations

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• MachineSSAUpdater: insert IMPLICIT_DEF at top of basic block

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Commits on Aug 5, 2019

• AMDGPU: add missing llvm.amdgcn.{raw,struct}.buffer.atomic.{inc,dec}

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Commits on Jul 17, 2019

• AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC

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• AMDGPU: Improve alias analysis for GDS

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Commits on Jul 1, 2019

• AMDGPU/GFX10: implement ds_ordered_count changes

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• AMDGPU: Support GDS atomics

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• AMDGPU/GFX10: fix scratch resource descriptor

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Commits on Jun 27, 2019

• AMDGPU: Make fixing i1 copies robust against re-ordering

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Commits on Jun 26, 2019

• llvm-objcopy: silence warning introduced in r364296

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Commits on Jun 25, 2019

• AMDGPU: Write LDS objects out as global symbols in code generation

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• AMDGPU/MC: Add .amdgpu_lds directive

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Commits on Jun 17, 2019

• AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer

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• AMDGPU: Explicitly define a triple for some tests

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• AsmPrinter: add doc-string for EmitLinkage

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Commits on Jun 16, 2019

• [AsmPrinter] Make EmitLinkage and EmitVisibility public

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• AMDGPU: Prepare for explicit absolute relocations in code generation

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• AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0

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• AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load intrinsic

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Commits on Jun 3, 2019

• AMDGPU/GFX10: V_CMPX_xxx instructions still have an omod operand

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Commits on May 15, 2019

• [MachineOperand] Add a ChangeToGA method

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• RegAlloc: try to fail more gracefully when out of registers

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Commits on May 7, 2019

• AMDGPU: Verify that SOP2/SOPC instructions have at most one immediate operand

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Commits on Apr 23, 2019

• AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies

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Commits on Apr 18, 2019

• [SDA] Bug fix: Use IPD outside the loop as divergence bound

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Commits on Feb 4, 2019

• [InstCombine] Cleanup the TFE/LWE check in AMDGPU SimplifyDemanded

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Commits on Dec 19, 2018

• Fix test MC/AMDGPU/reloc.s

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• AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1

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Commits on Dec 6, 2018

• AMDGPU: Generate VALU ThreeOp Integer instructions

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Commits on Nov 30, 2018

• LegacyDivergenceAnalysis: fix uninitialized value

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• AMDGPU: Divergence-driven selection of scalar buffer load intrinsics

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• AMDGPU: Fix various issues around the VirtReg2Value mapping

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• [DA] GPUDivergenceAnalysis for unstructured GPU kernels

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• TableGen/ISel: Allow PatFrag predicate code to access captured operands

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Commits on Nov 29, 2018

• AMDGPU/InsertWaitcnts: Remove the dependence on MachineLoopInfo

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