Update simd in 20230701 (plctlab#730)

2023/2023-07-01.md

@@ -179,6 +179,19 @@
 
 ## LIBCXX Experimental/simd
 
+- LLVM上游提交进展
+	- 更新了以下几个补丁：
+		- [[libcxx] <experimental/simd> Add ABI tags, class template simd/simd_mask implementations. Add related simd traits and tests.](https://reviews.llvm.org/D144362)
+		- [[libcxx] <experimental/simd> Added simd width functions, simd_size traits and related tests](https://reviews.llvm.org/D144363)
+		- [[libcxx] <experimental/simd> Added aliagned flag types, traits is_simd_flag_type[_v], memory_alignment[_v] and related tests](https://reviews.llvm.org/D153319)
+
+- 其他工作
+       - 新建了用于在Compiler explorer测试的libcxx-simd仓库，仅需包含仓库头文件即可进行测试，欢迎大家试用[LibCxx SIMD: Single Header Library
+](https://github.com/plctlab/simd_for_godbolt)
+	- 添加了内部接口测试
+	- 对LLVM上游最新代码做了rebase，并解决了clang-tidy相关代码格式问题
+	- 添加了simd/simd_mask类与其内部存储类型的显式类型转换接口
+
 ## LuaJIT RV64G 移植
 
 JIT is now largely functional; LuaJIT/LuaJIT-test-cleanup could pass 505/508 cases, on par with LuaJIT on other platform. Programs like Minetest, Scimark, and Sysbench are said to be running without any issues.
@@ -204,6 +217,8 @@ Additionally, the program doesn't currently have debug information for unwinding
 
 ## gem5
 
+本期没有新的进展。
+
 ## Spike
 
 - 维护bf16支持(已合并):https://github.com/riscv-software-src/riscv-isa-sim/pull/1321