Skip to content

A fork of Ethereum miner with OpenCL-based FPGA mining support (currently Intel FPGAs).

License

Notifications You must be signed in to change notification settings

Sayeh-1337/ethminer_fpga

 
 

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

ethminer_fpga

Modified version of the OpenCL-ready Ethereum miner (etminer) with support for FPGAs (HW Accelerators).

Quick-start Guide

  • Make sure your FPGA supports OpenCL.
  • Build this miner from its source using CMake. You can benifit from the special build scripts (e.g., scripts/build_windows.bat for Windows) or follow the original instructions from the forked Ethminer (here docs/BUILD.md).
  • FPGAs dont build the OpenCL Kernels online and the kernels need to be built apriori. Each vendor (e.g., Intel Altera or Xilinx) provide their own toolchains (OpenCL High-Level Synthesis Compiler). You can benifit from the example build script I made for Intel Altera toolchain on the Terasic DE10-Pro card in (libethash-cl/kernels/cl/custom/s10_sh2e1_4Gx2/build.bat). Notice that you may need to slightly modify the OpenCL kernel to make it comparible with the requirements of the toolchain and what levels of OpenCL does it support. See my modified OpenCL kernel for Intel Aaltera / Terasic DE10-Pro card.
  • Once the kernel is compiled, run the miner and pass the kernel binary to it. You may here also benifit from my launch script that runs on Intel Aaltera / Terasic DE10-Pro card.
  • If things work for you, dont forget to donate ;)

Usage of the miner software

The ethminer is a command line program. This means you launch it either from a Windows command prompt or Linux console, or create shortcuts to predefined command lines using a Linux Bash script or Windows batch/cmd file. For a full list of available command, please run:

ethminer --help

Maintainers / Donations

The list of current and past maintainers, authors and contributors to the ethminer_fpga project.

Name Contact
M. Khaled @mkhaled87 ETH: 0x14551935EDf4aF06909336084412dd805aE14b26,
BTC: 1MKHALEDqXhBzqa86hj8FbDGW5HvDdA5Tq

Tested Devices

Device Details Hashrates
Terasic DE10-Pro
Type: Accelerator/FPGA
FPGA: Stratix 10 GX/SX
RAM: 8 GB DDR4
More details: Terasic website
s10_sh2e1_4Gx2 (2 CU)/LWS_256: 1.44 Mh/s.
s10_sh2e1_8Gx4 (4CU)/LWS_256: Soon.

License

Licensed under the GNU General Public License, Version 3.

About

A fork of Ethereum miner with OpenCL-based FPGA mining support (currently Intel FPGAs).

Resources

License

Stars

Watchers

Forks

Packages

No packages published

Languages

  • C++ 85.0%
  • C 7.2%
  • Cuda 3.5%
  • CMake 2.0%
  • Shell 1.7%
  • Batchfile 0.5%
  • Makefile 0.1%