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tree-sitter-systemverilog Public
Forked from gmlarumbe/tree-sitter-systemverilogRewrite of tree-sitter-verilog
SystemVerilog MIT License UpdatedJan 14, 2025 -
chimera-sdk Public
Forked from pulp-platform/chimera-sdkPython Apache License 2.0 UpdatedJan 9, 2025 -
axi Public
Forked from LucaRufer/axiAXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
SystemVerilog Other UpdatedNov 25, 2024 -
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cva6 Public
Forked from pulp-platform/cva6This is the fork of CVA6 intended for PULP development.
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cheshire Public
Forked from pulp-platform/cheshireA minimal Linux-capable 64-bit RISC-V SoC built around CVA6
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slang Public
Forked from MikePopoloski/slangSystemVerilog compiler and language services
C++ MIT License UpdatedMay 1, 2024 -
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quantlib Public
Forked from pulp-platform/quantlibA library to train and deploy quantised Deep Neural Networks
Python Apache License 2.0 UpdatedMar 6, 2024 -
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core-v-mcu Public
Forked from openhwgroup/core-v-mcuThis is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
SystemVerilog Other UpdatedJul 20, 2023 -
dory Public
Forked from siracusa-soc/doryA tool to deploy Deep Neural Networks on PULP-based SoC's
C Apache License 2.0 UpdatedMar 1, 2023 -
pulp-riscv-binutils-gdb Public
Forked from pulp-platform/pulp-riscv-binutils-gdbC GNU General Public License v2.0 UpdatedFeb 23, 2022 -
gap_sdk Public
Forked from GreenWaves-Technologies/gap_sdkSDK for Greenwaves Technologies' GAP8 IoT Application Processor
C Apache License 2.0 UpdatedFeb 9, 2021 -