Skip to content

Commit

Permalink
[!] Fix links in readme.
Browse files Browse the repository at this point in the history
[+] Add registers modification capability from GUI
[!] Fix bug in 'help' command
  • Loading branch information
sergeykhbr committed Jan 13, 2017
1 parent 03e470f commit 984aa6d
Show file tree
Hide file tree
Showing 9 changed files with 51 additions and 12 deletions.
14 changes: 8 additions & 6 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -144,8 +144,8 @@ the following animated picture:

There's dependency of two others open source projects:

* [**Qt-libraries**](https://www.qt.io/download/)
* [**SystemC library**](http://accellera.org/downloads/standards/systemc)
* **[Qt-libraries](https://www.qt.io/download/)**
* **[SystemC library](http://accellera.org/downloads/standards/systemc)**

1. Download and install Qt-package (checked with version 5.7).
2. Specify environment variable QT_PATH:
Expand All @@ -167,9 +167,9 @@ There's dependency of two others open source projects:

$ export SYSTEMC_PATH=/home/user/systemc-2.3.1a/build")

**Note: System Simulator supports blocking and non-blocking accesses to the simulated
devices. You can request additional information of how to connect your
SystemC device to this SoC.**
**Note: System Simulator supports blocking and non-blocking accesses to the simulated
devices. You can request additional information of how to connect your
SystemC device to this SoC.**

6. Build project:

Expand All @@ -194,7 +194,9 @@ Ethernet your can find [here](http://sergeykhbr.github.io/riscv_vhdl/eth_link.ht
Simulation and Hardware targets use identical EDCL over UDP interface so that
[Debugger](http://sergeykhbr.github.io/riscv_vhdl/dbg_link.html) can work
with any target using the same set of commands.
**Debugger doesn't implement any specific interface for the simulation.**

**Debugger doesn't implement any specific interface for the simulation.
Debugger uses only architectural access via TAP (EDCL over UDP) for all targets.**


## Step III: Build FPGA image
Expand Down
2 changes: 1 addition & 1 deletion debugger/makefiles/make_appdbg64g
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ $(EXECUTABLE): $(OBJ_FILES)
$(ECHO) " cd ../linuxbuild/bin"
$(ECHO) " ./_run_functional_sim.sh - Start functional simulation"
$(ECHO) " ./_run_systemc_sim.sh - Start cycle-true SystemC simulation"
$(ECHO) " ./_run_fpga_gui.sh - Start with FPGA (COM3, 195.168.0.51)\n"
$(ECHO) " ./_run_fpga_gui.sh - Start with FPGA (COM3, 195.168.0.53)\n"

$(addprefix $(OBJ_DIR)/,%.o): %.cpp
echo $(CPP) $(CFLAGS) $(addprefix $(INCL_KEY),$(INCL_PATH)) $< -o $@
Expand Down
24 changes: 24 additions & 0 deletions debugger/src/gui_plugin/CpuWidgets/RegWidget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,9 @@ RegWidget::RegWidget(const char *name, QWidget *parent)

setMinimumWidth(edit_->width() + fm.width(name_) + 16);
setMinimumHeight(edit_->height());

connect(edit_, SIGNAL(editingFinished()),
this, SLOT(slotEditingFinished()));
}

void RegWidget::slotHandleResponse(AttributeType *resp) {
Expand All @@ -83,4 +86,25 @@ void RegWidget::slotHandleResponse(AttributeType *resp) {
}
}

void RegWidget::slotEditingFinished() {
wchar_t wcsConv[128];
char mbsConv[128];
int sz = edit_->text().toWCharArray(wcsConv);
uint64_t new_val;
wcstombs(mbsConv, wcsConv, sz);
mbsConv[sz] = '\0';

new_val = strtoull(mbsConv, 0, 16);

if (new_val != value_) {
char tstr[128];
RISCV_sprintf(tstr, sizeof(tstr), "reg %s 0x%s",
regName_.to_string(), mbsConv);
cmdWrite_.make_string(tstr);

emit signalChanged(&cmdWrite_);
setFocus();
}
}

} // namespace debugger
4 changes: 3 additions & 1 deletion debugger/src/gui_plugin/CpuWidgets/RegWidget.h
Original file line number Diff line number Diff line change
Expand Up @@ -21,13 +21,15 @@ class RegWidget : public QWidget {
explicit RegWidget(const char *name, QWidget *parent);

signals:
//void signalChanged(uint64_t idx, uint64_t val);
void signalChanged(AttributeType *req);
private slots:
void slotHandleResponse(AttributeType *resp);
void slotEditingFinished();

private:
AttributeType regName_;
AttributeType cmdRead_;
AttributeType cmdWrite_;
QString name_;
QLineEdit *edit_;
uint64_t value_;
Expand Down
8 changes: 7 additions & 1 deletion debugger/src/gui_plugin/CpuWidgets/RegsViewWidget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,10 @@ void RegsViewWidget::slotUpdateByTimer() {
waitingResp_ = true;
}

void RegsViewWidget::slotRegChanged(AttributeType *wrcmd) {
igui_->registerCommand(0, wrcmd, true);
}

void RegsViewWidget::addRegWidget(int idx, const char *name) {
int line = idx / 3;
int col = idx - 3 * line;
Expand All @@ -85,7 +89,9 @@ void RegsViewWidget::addRegWidget(int idx, const char *name) {

connect(this, SIGNAL(signalHandleResponse(AttributeType *)),
pnew, SLOT(slotHandleResponse(AttributeType *)));
}

connect(pnew, SIGNAL(signalChanged(AttributeType *)),
this, SLOT(slotRegChanged(AttributeType *)));
}

} // namespace debugger
1 change: 1 addition & 0 deletions debugger/src/gui_plugin/CpuWidgets/RegsViewWidget.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ class RegsViewWidget : public UnclosableWidget,

private slots:
void slotUpdateByTimer();
void slotRegChanged(AttributeType *wrcmd);

private:
void addRegWidget(int idx, const char *name);
Expand Down
2 changes: 1 addition & 1 deletion debugger/src/libdbg64g/services/exec/cmd/cmd_loadelf.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ CmdLoadElf::CmdLoadElf(ITap *tap, ISocInfo *info)
"Description:\n"
" Load ELF-file to SOC target memory.\n"
"Example:\n"
" load /home/riscv/image.elf\n");
" loadelf /home/riscv/image.elf\n");
}

bool CmdLoadElf::isValid(AttributeType *args) {
Expand Down
2 changes: 1 addition & 1 deletion debugger/src/libdbg64g/services/exec/cmdexec.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,7 @@ ICommand *CmdExecutor::getICommand(const char *name) {
return ret;
}
}
return ret;
return 0;
}

void CmdExecutor::splitLine(char *str, AttributeType *listArgs) {
Expand Down
6 changes: 5 additions & 1 deletion rocket_soc/fw/helloworld/makefiles/make_example
Original file line number Diff line number Diff line change
Expand Up @@ -40,13 +40,17 @@ all: example
.PHONY: $(EXECUTABLE)


example: $(EXECUTABLE)
example: $(EXECUTABLE) $(DUMPFILE)

$(EXECUTABLE): $(OBJ_FILES)
echo $(CPP) $(LDFLAGS) $(addprefix $(OBJ_DIR)/,$(OBJ_FILES)) -o $(addprefix $(ELF_DIR)/,$@) $(addprefix -l,$(LIB_NAMES))
$(CPP) $(LDFLAGS) $(addprefix $(OBJ_DIR)/,$(OBJ_FILES)) -o $(addprefix $(ELF_DIR)/,$@) $(addprefix -l,$(LIB_NAMES))
$(ECHO) "\n helloworld has been built successfully.\n"

$(DUMPFILE): $(EXECUTABLE)
echo $(OBJDUMP) --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.data $(addprefix $(ELF_DIR)/,$<) > $(addprefix $(ELF_DIR)/,$@)
$(OBJDUMP) --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.data $(addprefix $(ELF_DIR)/,$<) > $(addprefix $(ELF_DIR)/,$@)

%.o: %.cpp
echo $(CPP) $(CFLAGS) $(addprefix $(INCL_KEY),$(INCL_PATH)) $< -o $(addprefix $(OBJ_DIR)/,$@)
$(CPP) $(CFLAGS) $(addprefix $(INCL_KEY),$(INCL_PATH)) $< -o $(addprefix $(OBJ_DIR)/,$@)
Expand Down

0 comments on commit 984aa6d

Please sign in to comment.