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Electronic engineering student with interest in RISC-V open-source hardware & ML FPGA-based acceleration. Incoming Intern @ AMD
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neural_net_digital_predistortion
neural_net_digital_predistortion PublicA neural network-based digital predistortion (DPD) solution for offsetting nonlinearities in RF power amplifiers. Including a hardware implementation using a High-Level Synthesis (HLS) accelerator.
Jupyter Notebook 1
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32-bit-RISCV-based-piplined-core
32-bit-RISCV-based-piplined-core Public5-stage-piplined 32-bit RISC V core built using digital logic CAD simulator (see repo : https://github.com/hneemann/Digital).
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