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Merge tag 'pull-target-arm-20250210' of https://git.linaro.org/people…
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…/pmaydell/qemu-arm into staging

target-arm queue:
 * Deprecate pxa2xx CPUs, iwMMXt emulation, -old-param option
 * Drop unused AArch64DecodeTable typedefs
 * Minor code cleanups
 * hw/net/cadence_gem:  Fix the mask/compare/disable-mask logic
 * linux-user: Do not define struct sched_attr if libc headers do

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 # gpg: Signature made Mon 10 Feb 2025 10:49:15 EST
 # gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
 # gpg:                issuer "[email protected]"
 # gpg: Good signature from "Peter Maydell <[email protected]>" [full]
 # gpg:                 aka "Peter Maydell <[email protected]>" [full]
 # gpg:                 aka "Peter Maydell <[email protected]>" [full]
 # gpg:                 aka "Peter Maydell <[email protected]>" [unknown]
 # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250210' of https://git.linaro.org/people/pmaydell/qemu-arm:
  linux-user: Do not define struct sched_attr if libc headers do
  qemu-options: Deprecate -old-param command line option
  hw/net/cadence_gem:  Fix the mask/compare/disable-mask logic
  hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro
  hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE
  hw/arm/fsl-imx7: Add local 'mpcore/gic' variables
  hw/arm/fsl-imx6ul: Add local 'mpcore/gic' variables
  hw/arm/fsl-imx6: Add local 'mpcore/gic' variables
  hw/arm/boot: Propagate vCPU to arm_load_dtb()
  target/arm: Drop unused AArch64DecodeTable typedefs
  tests/tcg/arm: Remove test-arm-iwmmxt test
  target/arm: deprecate the pxa2xx CPUs and iwMMXt emulation

Conflicts:
- The iwMMXt deprecation notice conflicted with the 32-bit host
  operating system deprecation notice. Add both notices.

Signed-off-by: Stefan Hajnoczi <[email protected]>
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stefanhaRH committed Feb 10, 2025
2 parents 54e91d1 + 27a8d89 commit 4f1d018
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34 changes: 34 additions & 0 deletions docs/about/deprecated.rst
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,19 @@ configurations (e.g. -smp drawers=1,books=1,clusters=1 for x86 PC machine) is
marked deprecated since 9.0, users have to ensure that all the topology members
described with -smp are supported by the target machine.

``-old-param`` option for booting Arm kernels via param_struct (since 10.0)
'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''

The ``-old-param`` command line option is specific to Arm targets:
it is used when directly booting a guest kernel to pass it the
command line and other information via the old ``param_struct`` ABI,
rather than the newer ATAGS or DTB mechanisms. This option was only
ever needed to support ancient kernels on some old board types
like the ``akita`` or ``terrier``; it has been deprecated in the
kernel since 2001. None of the board types QEMU supports need
``param_struct`` support, so this option has been deprecated and will
be removed in a future QEMU version.

User-mode emulator command line arguments
-----------------------------------------

Expand Down Expand Up @@ -211,6 +224,27 @@ Keeping 32-bit host support alive is a substantial burden for the
QEMU project. Thus QEMU will in future drop the support for all
32-bit host systems.

linux-user mode CPUs
--------------------

iwMMXt emulation and the ``pxa`` CPUs (since 10.0)
''''''''''''''''''''''''''''''''''''''''''''''''''

The ``pxa`` CPU family (``pxa250``, ``pxa255``, ``pxa260``,
``pxa261``, ``pxa262``, ``pxa270-a0``, ``pxa270-a1``, ``pxa270``,
``pxa270-b0``, ``pxa270-b1``, ``pxa270-c0``, ``pxa270-c5``) are no
longer used in system emulation, because all the machine types which
used these CPUs were removed in the QEMU 9.2 release. These CPUs can
now only be used in linux-user mode, and to do that you would have to
explicitly select one of these CPUs with the ``-cpu`` command line
option or the ``QEMU_CPU`` environment variable.

We don't believe that anybody is using the iwMMXt emulation, and we do
not have any tests to validate it or any real hardware or similar
known-good implementation to test against. GCC is in the process of
dropping their support for iwMMXt codegen. These CPU types are
therefore deprecated in QEMU, and will be removed in a future release.

System emulator CPUs
--------------------

Expand Down
11 changes: 6 additions & 5 deletions hw/arm/boot.c
Original file line number Diff line number Diff line change
Expand Up @@ -432,13 +432,12 @@ static int fdt_add_memory_node(void *fdt, uint32_t acells, hwaddr mem_base,
return ret;
}

static void fdt_add_psci_node(void *fdt)
static void fdt_add_psci_node(void *fdt, ARMCPU *armcpu)
{
uint32_t cpu_suspend_fn;
uint32_t cpu_off_fn;
uint32_t cpu_on_fn;
uint32_t migrate_fn;
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
const char *psci_method;
int64_t psci_conduit;
int rc;
Expand Down Expand Up @@ -512,7 +511,8 @@ static void fdt_add_psci_node(void *fdt)
}

int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
hwaddr addr_limit, AddressSpace *as, MachineState *ms)
hwaddr addr_limit, AddressSpace *as, MachineState *ms,
ARMCPU *cpu)
{
void *fdt = NULL;
int size, rc, n = 0;
Expand Down Expand Up @@ -655,7 +655,7 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
}
}

fdt_add_psci_node(fdt);
fdt_add_psci_node(fdt, cpu);

if (binfo->modify_dtb) {
binfo->modify_dtb(binfo, fdt);
Expand Down Expand Up @@ -1327,7 +1327,8 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info)
* decided whether to enable PSCI and set the psci-conduit CPU properties.
*/
if (!info->skip_dtb_autoload && have_dtb(info)) {
if (arm_load_dtb(info->dtb_start, info, info->dtb_limit, as, ms) < 0) {
if (arm_load_dtb(info->dtb_start, info, info->dtb_limit,
as, ms, cpu) < 0) {
exit(1);
}
}
Expand Down
52 changes: 21 additions & 31 deletions hw/arm/fsl-imx6.c
Original file line number Diff line number Diff line change
Expand Up @@ -117,6 +117,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
uint16_t i;
qemu_irq irq;
unsigned int smp_cpus = ms->smp.cpus;
DeviceState *mpcore = DEVICE(&s->a9mpcore);
DeviceState *gic;

if (smp_cpus > FSL_IMX6_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
Expand All @@ -143,21 +145,21 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
}

object_property_set_int(OBJECT(&s->a9mpcore), "num-cpu", smp_cpus,
&error_abort);
object_property_set_int(OBJECT(mpcore), "num-cpu", smp_cpus, &error_abort);

object_property_set_int(OBJECT(&s->a9mpcore), "num-irq",
object_property_set_int(OBJECT(mpcore), "num-irq",
FSL_IMX6_MAX_IRQ + GIC_INTERNAL, &error_abort);

if (!sysbus_realize(SYS_BUS_DEVICE(&s->a9mpcore), errp)) {
if (!sysbus_realize(SYS_BUS_DEVICE(mpcore), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a9mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);
sysbus_mmio_map(SYS_BUS_DEVICE(mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);

gic = mpcore;
for (i = 0; i < smp_cpus; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i,
sysbus_connect_irq(SYS_BUS_DEVICE(gic), i,
qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i + smp_cpus,
sysbus_connect_irq(SYS_BUS_DEVICE(gic), i + smp_cpus,
qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ));
}

Expand Down Expand Up @@ -195,8 +197,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
serial_table[i].irq));
qdev_get_gpio_in(gic, serial_table[i].irq));
}

s->gpt.ccm = IMX_CCM(&s->ccm);
Expand All @@ -207,8 +208,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt), 0, FSL_IMX6_GPT_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_GPT_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_GPT_IRQ));

/* Initialize all EPIT timers */
for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) {
Expand All @@ -228,8 +228,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
epit_table[i].irq));
qdev_get_gpio_in(gic, epit_table[i].irq));
}

/* Initialize all I2C */
Expand All @@ -249,8 +248,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
i2c_table[i].irq));
qdev_get_gpio_in(gic, i2c_table[i].irq));
}

/* Initialize all GPIOs */
Expand Down Expand Up @@ -307,11 +305,9 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
gpio_table[i].irq_low));
qdev_get_gpio_in(gic, gpio_table[i].irq_low));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
gpio_table[i].irq_high));
qdev_get_gpio_in(gic, gpio_table[i].irq_high));
}

/* Initialize all SDHC */
Expand All @@ -338,8 +334,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
esdhc_table[i].irq));
qdev_get_gpio_in(gic, esdhc_table[i].irq));
}

/* USB */
Expand All @@ -360,8 +355,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_USBn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6_USBn_IRQ[i]));
}

/* Initialize all ECSPI */
Expand All @@ -384,8 +378,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
spi_table[i].irq));
qdev_get_gpio_in(gic, spi_table[i].irq));
}

object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num,
Expand All @@ -396,11 +389,9 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth), 0, FSL_IMX6_ENET_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_ENET_MAC_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_ENET_MAC_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 1,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_ENET_MAC_1588_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_ENET_MAC_1588_IRQ));

/*
* SNVS
Expand All @@ -427,8 +418,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)

sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_WDOGn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6_WDOGn_IRQ[i]));
}

/*
Expand Down
64 changes: 27 additions & 37 deletions hw/arm/fsl-imx6ul.c
Original file line number Diff line number Diff line change
Expand Up @@ -157,10 +157,12 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(dev);
DeviceState *mpcore = DEVICE(&s->a7mpcore);
int i;
char name[NAME_SIZE];
SysBusDevice *sbd;
DeviceState *d;
DeviceState *gic;
SysBusDevice *gicsbd;
DeviceState *cpu;

if (ms->smp.cpus > 1) {
error_setg(errp, "%s: Only a single CPU is supported (%d requested)",
Expand All @@ -173,19 +175,19 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
/*
* A7MPCORE
*/
object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", 1, &error_abort);
object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
object_property_set_int(OBJECT(mpcore), "num-cpu", 1, &error_abort);
object_property_set_int(OBJECT(mpcore), "num-irq",
FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);
sysbus_realize(SYS_BUS_DEVICE(mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);

sbd = SYS_BUS_DEVICE(&s->a7mpcore);
d = DEVICE(&s->cpu);

sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(d, ARM_CPU_IRQ));
sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(d, ARM_CPU_FIQ));
sysbus_connect_irq(sbd, 2, qdev_get_gpio_in(d, ARM_CPU_VIRQ));
sysbus_connect_irq(sbd, 3, qdev_get_gpio_in(d, ARM_CPU_VFIQ));
gic = mpcore;
gicsbd = SYS_BUS_DEVICE(gic);
cpu = DEVICE(&s->cpu);
sysbus_connect_irq(gicsbd, 0, qdev_get_gpio_in(cpu, ARM_CPU_IRQ));
sysbus_connect_irq(gicsbd, 1, qdev_get_gpio_in(cpu, ARM_CPU_FIQ));
sysbus_connect_irq(gicsbd, 2, qdev_get_gpio_in(cpu, ARM_CPU_VIRQ));
sysbus_connect_irq(gicsbd, 3, qdev_get_gpio_in(cpu, ARM_CPU_VFIQ));

/*
* A7MPCORE DAP
Expand Down Expand Up @@ -244,8 +246,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_GPTn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_GPTn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_GPTn_IRQ[i]));
}

/*
Expand All @@ -269,8 +270,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_EPITn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_EPITn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_EPITn_IRQ[i]));
}

/*
Expand Down Expand Up @@ -307,12 +307,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_GPIOn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_GPIOn_LOW_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_GPIOn_LOW_IRQ[i]));

sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
}

/*
Expand Down Expand Up @@ -366,8 +364,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_SPIn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_SPIn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_SPIn_IRQ[i]));
}

/*
Expand All @@ -392,8 +389,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX6UL_I2Cn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_I2Cn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_I2Cn_IRQ[i]));
}

/*
Expand Down Expand Up @@ -430,8 +426,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_UARTn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_UARTn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_UARTn_IRQ[i]));
}

/*
Expand Down Expand Up @@ -480,12 +475,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_ENETn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_ENETn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_ENETn_IRQ[i]));

sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
}

/*
Expand Down Expand Up @@ -521,8 +514,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6UL_USB02_USBn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_USBn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_USBn_IRQ[i]));
}

/*
Expand All @@ -547,8 +539,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_USDHCn_ADDR[i]);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_USDHCn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_USDHCn_IRQ[i]));
}

/*
Expand Down Expand Up @@ -580,8 +571,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
FSL_IMX6UL_WDOGn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a7mpcore),
FSL_IMX6UL_WDOGn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6UL_WDOGn_IRQ[i]));
}

/*
Expand Down
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