LAPC-578 devkit_e7: Add DWC 16550 uart support instead of PL011

Source: Alif Semiconductor
JIRA ID: LAPC-578
Type: Development
Disposition: Local
Description:

Reviewed-by: Hemanth Kumar <[email protected]>
Reviewed-by: Harith George <[email protected]>
Signed-off-by: Jagadeesh Krishnanjanappa <[email protected]>
Change-Id: I7db631467885c2acb9cac222f88e0ef1286180c3

Makefile

@@ -637,7 +637,7 @@ $(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY))
 $(eval $(call assert_boolean,BL2_AT_EL3))
 $(eval $(call assert_boolean,BL2_IN_XIP_MEM))
 $(eval $(call assert_boolean,ENABLE_AES))
-$(eval $(call assert_boolean,A1))
+$(eval $(call assert_boolean,B0))
 
 $(eval $(call assert_numeric,ARM_ARCH_MAJOR))
 $(eval $(call assert_numeric,ARM_ARCH_MINOR))
@@ -694,7 +694,7 @@ $(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY))
 $(eval $(call add_define,BL2_AT_EL3))
 $(eval $(call add_define,BL2_IN_XIP_MEM))
 $(eval $(call add_define,ENABLE_AES))
-$(eval $(call add_define,A1))
+$(eval $(call add_define,B0))
 $(eval $(call add_define,BL32_XIP_BASE))
 $(eval $(call add_define,BL32_IN_XIP_MEM))
 

plat/arm/board/corstone700/corstone700_plat.c

@@ -19,6 +19,7 @@
 const mmap_region_t plat_arm_mmap[] = {
 	ARM_MAP_SHARED_RAM,
 	ARM_MAP_NS_DRAM1,
+	UART_MAP_DEVICE,
 	CORSTONE700_MAP_DEVICE,
 	{0}
 };

plat/arm/board/devkit_e7/include/platform_def.h

@@ -65,7 +65,9 @@
 #define PSYSR_PP		BIT_32(26)
 
 # define PLAT_ARM_MMAP_ENTRIES          8
-# define MAX_XLAT_TABLES                5
+/* Set MAX_XLAT_TABLES to 7 in order to solve assertion failure at
+ * ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:97 */
+# define MAX_XLAT_TABLES                7
 
 #define PLAT_ARM_TRUSTED_SRAM_SIZE	UL(0x00040000)  /* 256 KB */
 
@@ -87,6 +89,15 @@
 						CORSTONE700_DEVICE_SIZE,      \
 						MT_DEVICE | MT_RW | MT_SECURE)
 
+#define UART_BASE_ADDR			(0x4901C000)
+#define UART_SIZE			(0x1000)
+#define UART_CLOCK_FREQ			100000000
+#define UART_BAUDRATE			115200
+
+#define UART_MAP_DEVICE			MAP_REGION_FLAT(		\
+						UART_BASE_ADDR, 	\
+						UART_SIZE,              \
+						MT_DEVICE | MT_RW | MT_SECURE)
 /* GIC related constants */
 #define PLAT_ARM_GICD_BASE              0x1C010000
 #define PLAT_ARM_GICC_BASE              0x1C02F000

plat/arm/board/devkit_e7/ospi_flash/norflash_ospi_setup.c

@@ -17,7 +17,7 @@
 #if (PRELOADED_BL33_BASE == 0xE0000000)
 #define CARRIER
 #endif
-#if ((PRELOADED_BL33_BASE == 0xD0000000) || A1 == 1)
+#if ((PRELOADED_BL33_BASE == 0xD0000000) || B0 == 1)
 #define DEVBOARD
 #endif
 #endif
@@ -688,7 +688,7 @@ int init_nor_flash(void)
 #endif
 
 	setup_PinMUX();
-#if A1 == 0 /* A0 DEV or CARRIER board with Adesto Flash */
+#if B0 == 0 /* A0 DEV or CARRIER board with Adesto Flash */
 	dws->spi_ser = 1;
 	dws->xip_ser = 1;
 	dws->addrlen = ADDR_LENGTH_32_BITS;
@@ -710,7 +710,7 @@ int init_nor_flash(void)
 
 	/* Set DDR or SDR operating mode */
 	flash_set_Data_mode(dws);
-#else  /* A1 with ISSI NOR Flash */
+#else  /* B0 with ISSI NOR Flash */
 	dws->dev_type = DEVICE_ISSI_NOR_FLASH; /* Set slave device as ISSI */
 	dws->spi_ser = 1;
 	dws->xip_ser = 1;

plat/arm/board/devkit_e7/platform.mk

@@ -7,12 +7,13 @@
 DEVKIT_E7_CPU_SOURCES	+=	lib/cpus/aarch32/cortex_a32.S
 
 BL32_SOURCES		+=      plat/arm/board/corstone700/drivers/mhu/mhu.c \
-				plat/arm/board/devkit_e7/ospi_flash/norflash_ospi_setup.c
+				plat/arm/board/$(PLAT)/ospi_flash/norflash_ospi_setup.c \
+				drivers/ti/uart/aarch32/16550_console.S
 
 PLAT_INCLUDES		:=      -Iplat/arm/board/$(PLAT)/include \
 					-Iinclude/plat/arm/common/ \
 					-Iplat/arm/board/corstone700/drivers/mhu/ \
-					-Iplat/arm/board/devkit_e7/ospi_flash/
+					-Iplat/arm/board/$(PLAT)/ospi_flash/
 
 NEED_BL32		:=	yes
 

plat/arm/common/aarch32/arm_helpers.S

@@ -45,10 +45,10 @@ endfunc plat_arm_calc_core_pos
 	 * ---------------------------------------------
 	 */
 func plat_crash_console_init
-	ldr	r0, =PLAT_ARM_CRASH_UART_BASE
-	ldr	r1, =PLAT_ARM_CRASH_UART_CLK_IN_HZ
-	ldr	r2, =ARM_CONSOLE_BAUDRATE
-	b	console_pl011_core_init
+	ldr	r0, =UART_BASE_ADDR
+	ldr	r1, =UART_CLOCK_FREQ
+	ldr	r2, =UART_BAUDRATE
+	b	console_16550_core_init
 endfunc plat_crash_console_init
 
 	/* ---------------------------------------------
@@ -59,8 +59,8 @@ endfunc plat_crash_console_init
 	 * ---------------------------------------------
 	 */
 func plat_crash_console_putc
-	ldr	r1, =PLAT_ARM_CRASH_UART_BASE
-	b	console_pl011_core_putc
+	ldr	r1, =UART_BASE_ADDR
+	b	console_16550_core_putc
 endfunc plat_crash_console_putc
 
 	/* ---------------------------------------------
@@ -72,6 +72,6 @@ endfunc plat_crash_console_putc
 	 * ---------------------------------------------
 	 */
 func plat_crash_console_flush
-	ldr	r0, =PLAT_ARM_CRASH_UART_BASE
-	b	console_pl011_core_flush
+	ldr	r0, =UART_BASE_ADDR
+	b	console_16550_core_flush
 endfunc plat_crash_console_flush

plat/arm/common/arm_console.c

@@ -9,25 +9,25 @@
 #include <platform_def.h>
 
 #include <common/debug.h>
-#include <drivers/arm/pl011.h>
+#include <drivers/ti/uart/uart_16550.h>
 #include <drivers/console.h>
 #include <plat/arm/common/plat_arm.h>
 
 /*******************************************************************************
  * Functions that set up the console
  ******************************************************************************/
 #if MULTI_CONSOLE_API
-static console_pl011_t arm_boot_console;
-static console_pl011_t arm_runtime_console;
+static console_16550_t arm_boot_console;
+static console_16550_t arm_runtime_console;
 #endif
 
 /* Initialize the console to provide early debug support */
 void __init arm_console_boot_init(void)
 {
 #if MULTI_CONSOLE_API
-	int rc = console_pl011_register(PLAT_ARM_BOOT_UART_BASE,
-					PLAT_ARM_BOOT_UART_CLK_IN_HZ,
-					ARM_CONSOLE_BAUDRATE,
+	int rc = console_16550_register(UART_BASE_ADDR,
+					UART_CLOCK_FREQ,
+					UART_BAUDRATE,
 					&arm_boot_console);
 	if (rc == 0) {
 		/*
@@ -61,9 +61,9 @@ void arm_console_boot_end(void)
 void arm_console_runtime_init(void)
 {
 #if MULTI_CONSOLE_API
-	int rc = console_pl011_register(PLAT_ARM_RUN_UART_BASE,
-					PLAT_ARM_RUN_UART_CLK_IN_HZ,
-					ARM_CONSOLE_BAUDRATE,
+	int rc = console_16550_register(UART_BASE_ADDR,
+					UART_CLOCK_FREQ,
+					UART_BAUDRATE,
 					&arm_runtime_console);
 	if (rc == 0)
 		panic();

plat/arm/common/sp_min/arm_sp_min_setup.c

@@ -29,6 +29,17 @@ static entry_point_info_t bl33_image_ep_info;
 					BL32_END - BL32_BASE,		\
 					MT_MEMORY | MT_RW | MT_SECURE)
 
+/* EXPMST0 Control Register */
+#define EXPMST0_CTRL_REG       (0x4902F000)
+/* UART Control Register */
+#define UART_CTRL_REG          (0x4902F008)
+/* PINMUX address for UART4_C RX and TX */
+#define PINMUX_UART4_RX_B_ADDR (0x1A603184)
+#define PINMUX_UART4_TX_B_ADDR (0x1A603188)
+/* UART4_C RX and TX selection values*/
+#define PINMUX_UART4_RX_B_VAL  (0x00230002)
+#define PINMUX_UART4_TX_B_VAL  (0x00230002)
+
 /*
  * Check that BL32_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
  * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
@@ -63,6 +74,23 @@ entry_point_info_t *sp_min_plat_get_bl33_ep_info(void)
 void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
 			uintptr_t hw_config, void *plat_params_from_bl2)
 {
+
+	uint32_t value;
+
+	/* Enable peripheral and APB clocks */
+	value = mmio_read_32(EXPMST0_CTRL_REG);
+	mmio_write_32(EXPMST0_CTRL_REG, (value | 0xC0000000));
+
+	/* Enable UART clock and select UART clock source */
+	value = mmio_read_32(UART_CTRL_REG);
+	mmio_write_32(UART_CTRL_REG, (value | 0x0000FFFF));
+
+	/* Initialize pinmux, and pad config for UART4_B */
+	value = mmio_read_32(PINMUX_UART4_RX_B_ADDR);
+	mmio_write_32(PINMUX_UART4_RX_B_ADDR, (value | PINMUX_UART4_RX_B_VAL));
+	value = mmio_read_32(PINMUX_UART4_TX_B_ADDR);
+	mmio_write_32(PINMUX_UART4_TX_B_ADDR, (value | PINMUX_UART4_TX_B_VAL));
+
 	/* Initialize the console to provide early debug support */
 	arm_console_boot_init();