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Revert "HSD #16020988342: net: stmmac: xgmac: Add FPE link partner ha…
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…nd-shaking support"

This reverts commit b7d05cb.
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rohangt07 committed Aug 8, 2024
1 parent 7fe3379 commit b53b0ee
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Showing 2 changed files with 2 additions and 64 deletions.
10 changes: 0 additions & 10 deletions drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
Original file line number Diff line number Diff line change
Expand Up @@ -109,7 +109,6 @@
#define XGMAC_LPIIS BIT(5)
#define XGMAC_PMTIS BIT(4)
#define XGMAC_INT_EN 0x000000b4
#define XGMAC_FPIE BIT(15)
#define XGMAC_TSIE BIT(12)
#define XGMAC_LPIIE BIT(5)
#define XGMAC_PMTIE BIT(4)
Expand Down Expand Up @@ -210,12 +209,6 @@
#define XGMAC_MDIO_DATA 0x00000204
#define XGMAC_MDIO_C22P 0x00000220
#define XGMAC_FPE_CTRL_STS 0x00000280
#define XGMAC_TRSP BIT(19)
#define XGMAC_TVER BIT(18)
#define XGMAC_RRSP BIT(17)
#define XGMAC_RVER BIT(16)
#define XGMAC_SRSP BIT(2)
#define XGMAC_SVER BIT(1)
#define XGMAC_EFPE BIT(0)
#define XGMAC_ADDRx_HIGH(x) (0x00000300 + (x) * 0x8)
#define XGMAC_ADDR_MAX 32
Expand Down Expand Up @@ -349,9 +342,6 @@
#define XGMAC_GCRR BIT(2)
#define XGMAC_SRWO BIT(0)
#define XGMAC_MTL_EST_GCL_DATA 0x00001084
#define XGMAC_MTL_FPE_CTRL_STS 0x00001090
#define XGMAC_PEC GENMASK(15,8)
#define XGMAC_PEC_SHIFT 8
#define XGMAC_MTL_RXP_CONTROL_STATUS 0x000010a0
#define XGMAC_RXPI BIT(31)
#define XGMAC_NPE GENMASK(23, 16)
Expand Down
56 changes: 2 additions & 54 deletions drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ static void dwxgmac2_core_init(struct mac_device_info *hw,
struct net_device *dev)
{
void __iomem *ioaddr = hw->pcsr;
u32 tx, rx, value;
u32 tx, rx;

tx = readl(ioaddr + XGMAC_TX_CONFIG);
rx = readl(ioaddr + XGMAC_RX_CONFIG);
Expand Down Expand Up @@ -45,11 +45,7 @@ static void dwxgmac2_core_init(struct mac_device_info *hw,

writel(tx, ioaddr + XGMAC_TX_CONFIG);
writel(rx, ioaddr + XGMAC_RX_CONFIG);

value = XGMAC_INT_DEFAULT_EN;
if ((XGMAC_HWFEAT_FPESEL & readl(ioaddr + XGMAC_HW_FEATURE3)) >> 26)
value |= XGMAC_FPIE;
writel(value, ioaddr + XGMAC_INT_EN);
writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);
}

static void dwxgmac2_set_mac(void __iomem *ioaddr, bool enable)
Expand Down Expand Up @@ -1915,52 +1911,6 @@ static void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *
writel(value, ioaddr + XGMAC_FPE_CTRL_STS);
}

static void dwxgmac3_fpe_send_mpacket(void __iomem *ioaddr,
struct stmmac_fpe_cfg *cfg,
enum stmmac_mpacket_type type)
{
u32 value = cfg->fpe_csr;

if (type == MPACKET_VERIFY)
value |= XGMAC_SVER;
else if (type == MPACKET_RESPONSE)
value |= XGMAC_SRSP;

writel(value, ioaddr + XGMAC_FPE_CTRL_STS);
}

static int dwxgmac3_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev)
{
u32 value;
int status;

status = FPE_EVENT_UNKNOWN;

value = readl(ioaddr + XGMAC_FPE_CTRL_STS);

if (value & XGMAC_TRSP) {
status |= FPE_EVENT_TRSP;
netdev_info(dev, "FPE: Respond mPacket is transmitted\n");
}

if (value & XGMAC_TVER) {
status |= FPE_EVENT_TVER;
netdev_info(dev, "FPE: Verify mPacket is transmitted\n");
}

if (value & XGMAC_RRSP) {
status |= FPE_EVENT_RRSP;
netdev_info(dev, "FPE: Respond mPacket is received\n");
}

if (value & XGMAC_RVER) {
status |= FPE_EVENT_RVER;
netdev_info(dev, "FPE: Verify mPacket is received\n");
}

return status;
}

const struct stmmac_ops dwxgmac210_ops = {
.core_init = dwxgmac2_core_init,
.set_mac = dwxgmac2_set_mac,
Expand Down Expand Up @@ -2010,8 +1960,6 @@ const struct stmmac_ops dwxgmac210_ops = {
.est_configure = dwxgmac3_est_configure,
.est_irq_status = dwxgmac3_est_irq_status,
.fpe_configure = dwxgmac3_fpe_configure,
.fpe_send_mpacket = dwxgmac3_fpe_send_mpacket,
.fpe_irq_status = dwxgmac3_fpe_irq_status,
.rx_hw_vlan = dwxgmac2_rx_hw_vlan,
.set_hw_vlan_mode = dwxgmac2_set_hw_vlan_mode,
};
Expand Down

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