Polygon Clipping and Offsetting - C++, C# and Delphi

Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source

A General-purpose Parallel and Heterogeneous Task Programming System

Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)

IDEA project source files

C++ Reflection Library

An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit

AMF-Placer: An open-source analytical mixed-size FPGA placer

Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.

🚀An automatic configuration program for vim

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sbt, the interactive build tool

Logic synthesis system from UC Berkeley

A list of resources related to the open-source FPGA projects

METIS - Serial Graph Partitioning and Fill-reducing Matrix Ordering

C++ logic network library

logic synthesis

Showcase examples for EPFL logic synthesis libraries

The ultimate Vim configuration (vimrc)

AddressSanitizer, ThreadSanitizer, MemorySanitizer

Flexible Intermediate Representation for RTL

Circuit IR Compilers and Tools

Chisel 3: A Modern Hardware Design Language

A hardware compiler based on LLHD.

SystemVerilog compiler and language services

A minimalistic and high-performance SAT solver

ABC: System for Sequential Logic Synthesis and Formal Verification

Icarus Verilog