drivers/bus: Change QSPI read_cmd signature to return an error code.

Signed-off-by: Damien George <[email protected]>
bozydar · Dec 9, 2022 · b042fd5 · b042fd5
1 parent 7ee5afe
commit b042fd5
Show file tree

Hide file tree

Showing 4 changed files with 29 additions and 19 deletions.
diff --git a/drivers/bus/qspi.h b/drivers/bus/qspi.h
@@ -43,7 +43,7 @@ typedef struct _mp_qspi_proto_t {
     int (*ioctl)(void *self, uint32_t cmd);
     int (*write_cmd_data)(void *self, uint8_t cmd, size_t len, uint32_t data);
     int (*write_cmd_addr_data)(void *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src);
-    uint32_t (*read_cmd)(void *self, uint8_t cmd, size_t len);
+    int (*read_cmd)(void *self, uint8_t cmd, size_t len, uint32_t *dest);
     int (*read_cmd_qaddr_qdata)(void *self, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest);
 } mp_qspi_proto_t;
 

diff --git a/drivers/bus/softqspi.c b/drivers/bus/softqspi.c
@@ -178,13 +178,14 @@ STATIC int mp_soft_qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t
     return 0;
 }
 
-STATIC uint32_t mp_soft_qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) {
+STATIC int mp_soft_qspi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_t *dest) {
     mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in;
     uint32_t cmd_buf = cmd;
     CS_LOW(self);
     mp_soft_qspi_transfer(self, 1 + len, (uint8_t*)&cmd_buf, (uint8_t*)&cmd_buf);
     CS_HIGH(self);
-    return cmd_buf >> 8;
+    *dest = cmd_buf >> 8;
+    return 0;
 }
 
 STATIC int mp_soft_qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {

diff --git a/drivers/memory/spiflash.c b/drivers/memory/spiflash.c
@@ -109,17 +109,16 @@ STATIC int mp_spiflash_transfer_cmd_addr_data(mp_spiflash_t *self, uint8_t cmd,
     return ret;
 }
 
-STATIC uint32_t mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len) {
+STATIC int mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len, uint32_t *dest) {
     const mp_spiflash_config_t *c = self->config;
     if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
-        uint32_t buf;
         mp_hal_pin_write(c->bus.u_spi.cs, 0);
         c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL);
-        c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)&buf, (void*)&buf);
+        c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)dest, (void*)dest);
         mp_hal_pin_write(c->bus.u_spi.cs, 1);
-        return buf;
+        return 0;
     } else {
-        return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len);
+        return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len, dest);
     }
 }
 
@@ -139,9 +138,12 @@ STATIC int mp_spiflash_write_cmd(mp_spiflash_t *self, uint8_t cmd) {
 }
 
 STATIC int mp_spiflash_wait_sr(mp_spiflash_t *self, uint8_t mask, uint8_t val, uint32_t timeout) {
-    uint8_t sr;
     do {
-        sr = mp_spiflash_read_cmd(self, CMD_RDSR, 1);
+        uint32_t sr;
+        int ret = mp_spiflash_read_cmd(self, CMD_RDSR, 1, &sr);
+        if (ret != 0) {
+            return ret;
+        }
         if ((sr & mask) == val) {
             return 0; // success
         }
@@ -180,17 +182,23 @@ void mp_spiflash_init(mp_spiflash_t *self) {
 
     #if defined(CHECK_DEVID)
     // Validate device id
-    uint32_t devid = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3);
-    if (devid != CHECK_DEVID) {
-        return 0;
+    uint32_t devid;
+    int ret = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3, &devid);
+    if (ret != 0 || devid != CHECK_DEVID) {
+        mp_spiflash_release_bus(self);
+        return;
     }
     #endif
 
     if (self->config->bus_kind == MP_SPIFLASH_BUS_QSPI) {
         // Set QE bit
-        uint32_t data = (mp_spiflash_read_cmd(self, CMD_RDSR, 1) & 0xff)
-            | (mp_spiflash_read_cmd(self, CMD_RDCR, 1) & 0xff) << 8;
-        if (!(data & (QSPI_QE_MASK << 8))) {
+        uint32_t sr = 0, cr = 0;
+        int ret = mp_spiflash_read_cmd(self, CMD_RDSR, 1, &sr);
+        if (ret == 0) {
+            ret = mp_spiflash_read_cmd(self, CMD_RDCR, 1, &cr);
+        }
+        uint32_t data = (sr & 0xff) | (cr & 0xff) << 8;
+        if (ret == 0 && !(data & (QSPI_QE_MASK << 8))) {
             data |= QSPI_QE_MASK << 8;
             mp_spiflash_write_cmd(self, CMD_WREN);
             mp_spiflash_write_cmd_data(self, CMD_WRSR, 2, data);

diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c
@@ -312,7 +312,7 @@ STATIC int qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, s
     return 0;
 }
 
-STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) {
+STATIC int qspi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_t *dest) {
     (void)self_in;
 
     QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag
@@ -334,15 +334,16 @@ STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) {
     // Wait for read to finish
     while (!(QUADSPI->SR & QUADSPI_SR_TCF)) {
         if (QUADSPI->SR & QUADSPI_SR_TEF) {
-            // Not sure that calling functions will deal with this appropriately
             return -MP_EIO;
         }
     }
 
     QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag
 
     // Read result
-    return QUADSPI->DR;
+    *dest = QUADSPI->DR;
+
+    return 0;
 }
 
 STATIC int qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {