Merge remote-tracking branch 'origin/compiler_plugin' into scala_2.13…

…_dev
c-thaler · Feb 11, 2020 · dec769a · dec769a
2 parents b6e3911 + 8a5a8c8
commit dec769a
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Showing 11 changed files with 5 additions and 25 deletions.
diff --git a/tester/src/test/scala/spinal/tester/pending/SpinalSimPinsec.scala b/tester/src/test/scala/spinal/tester/pending/SpinalSimPinsec.scala
@@ -11,7 +11,6 @@ object SpinalSimPinsec {
       .doSimUntilVoid(new Pinsec(PinsecConfig.default)){dut =>
         ClockDomain(dut.io.axiClk, dut.io.asyncReset).forkStimulus(10)
         ClockDomain(dut.io.axiClk, dut.io.asyncReset).forkSimSpeedPrinter()
-        ()
       }
   }
 }
diff --git a/tester/src/test/scala/spinal/tester/scalatest/RomTester.scala b/tester/src/test/scala/spinal/tester/scalatest/RomTester.scala
@@ -146,7 +146,6 @@ class SpinalSimRomTester extends FunSuite {
         dut.address.randomize()
         sleep(1)
         assert(dut.data.toBigInt == rom(dut.address.toInt))
-        ()
       }
 
     }

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimAccessSubComponents.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimAccessSubComponents.scala
@@ -69,7 +69,6 @@ class SpinalSimAccessSubComponents extends FunSuite{
         assert(dut.subInst.subSubInst.miaouVec(1).toInt == (dut.io.b.toInt))
         assert(dut.subInst.subSubInst.miaouVec(2).toInt == (dut.io.a.toInt ^ dut.io.b.toInt))
         assert(dut.subInst.subSubInst.miaouVec(3).toInt == (dut.io.a.toInt & dut.io.b.toInt))
-        ()
       }
     }
   }

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimApbI2C.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimApbI2C.scala
@@ -245,8 +245,6 @@ class SpinalSimApbI2C extends FunSuite {
         if(index >= cmdSlave.length){
           busy = false
         }
-
-        () //
       }
     }
 

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimBmbInterconnectGeneratorTester.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimBmbInterconnectGeneratorTester.scala
@@ -17,23 +17,22 @@ import scala.util.Random
 
 //TODO handle generation when a master has no slave
 class SpinalSimBmbInterconnectGeneratorTester  extends FunSuite{
-  def wrap[T](body : => T) = body
   def f() = {
     new GeneratorComponent(new Generator {
       val interconnect = BmbInterconnectGenerator()
 
 
-      def addMaster(requirements : BmbParameter) = wrap(new Generator {
+      def addMaster(requirements : BmbParameter) = new Generator {
         val busHandle = Handle[Bmb]
         interconnect.addMaster(requirements, busHandle)
 
         val logic = add task new Area{
           val bus = slave(Bmb(requirements))
           busHandle.load(bus)
         }
-      })
+      }
 
-      def addSlave(address : BigInt, capabilities : BmbParameter) = wrap(new Generator{
+      def addSlave(address : BigInt, capabilities : BmbParameter) = new Generator{
         val requirements = Handle[BmbParameter]
         val busHandle = Handle[Bmb]
         interconnect.addSlaveAt(capabilities, requirements, busHandle, address)
@@ -42,7 +41,7 @@ class SpinalSimBmbInterconnectGeneratorTester  extends FunSuite{
           val bus = master(Bmb(requirements))
           busHandle.load(bus)
         }
-      })
+      }
 
 
       val mA = addMaster(BmbParameter(

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimClockDomainTest.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimClockDomainTest.scala
@@ -78,7 +78,6 @@ class SpinalSimClockDomainTest extends FunSuite {
             dut.io.c #= c
             cd.waitActiveEdge(); sleep(0)
             if (cd.isResetDeasserted) assert(dut.io.result.toInt == ((a + b - c) & 0xFF))
-            ()
           }
         }
     }
@@ -143,7 +142,6 @@ class SpinalSimClockDomainTest extends FunSuite {
           dut.clockDomain.waitActiveEdge();sleep(0)
           if(dut.io.enable.toBoolean) model = (model + 1) & 0xFF
           assert(dut.io.result.toInt == model)
-          ()
         }
       }
   }
@@ -161,7 +159,6 @@ class SpinalSimClockDomainTest extends FunSuite {
           dut.clockDomain.waitActiveEdge(waited); sleep(0)
           if(dut.io.enable.toBoolean) model = (model + waited) & 0xFF
           assert(dut.io.result.toInt == model)
-          ()
         }
       }
   }

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimMiscTester.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimMiscTester.scala
@@ -69,7 +69,6 @@ class SpinalSimMiscTester extends FunSuite {
             counterModel = (counterModel + 1) & 0xFF
           }
           assert(dut.io.value.toInt == counterModel)
-          ()
         }
       })
     }
@@ -88,7 +87,6 @@ class SpinalSimMiscTester extends FunSuite {
             counterModel = (counterModel + 1) & 0xFF
           }
           assert(dut.io.value.toInt == counterModel)
-          ()
         }
       })
     }
@@ -154,7 +152,6 @@ class SpinalSimMiscTester extends FunSuite {
           counterModel = (counterModel + 1) & 0xFF
         }
         assert(dut.io.value.toInt == counterModel)
-        ()
       }
     })
   }

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimMultiThreadingTest.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimMultiThreadingTest.scala
@@ -44,7 +44,6 @@ class SpinalSimMultiThreadingTest extends FunSuite {
                     dut.io.c #= c
                     dut.clockDomain.waitActiveEdge(); sleep(0)
                     if (dut.clockDomain.isResetDeasserted) assert(dut.io.result.toInt == ((a + b - c + i + t) & 0xFF))
-                    ()
                   }
                 }
             } catch {

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimPerfTester.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimPerfTester.scala
@@ -129,7 +129,6 @@ class SpinalSimPerfTester extends FunSuite {
           dut.io.c #= c
           dut.clockDomain.waitActiveEdge(); sleep(0)
           if (dut.clockDomain.isResetDeasserted) assert(dut.io.result.toBigInt == ((a + b - c) & 0xFF))
-          ()
         }
         val endAt = System.nanoTime
         System.out.println((endAt - startAt) * 1e-6 + " ms")

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimStreamFifoTester.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimStreamFifoTester.scala
@@ -49,7 +49,6 @@ class SpinalSimStreamFifoTester extends FunSuite {
           dut.clockDomain.waitSampling()
           if(dut.io.pop.valid.toBoolean && dut.io.pop.ready.toBoolean){
             assert(dut.io.pop.payload.toLong == queueModel.dequeue())
-            ()
           }
         }
         simSuccess()
@@ -94,7 +93,6 @@ class SpinalSimStreamFifoTester extends FunSuite {
           dut.clockDomain.waitSampling()
           if(dut.io.pop.valid.toBoolean && dut.io.pop.ready.toBoolean){
             assert(dut.io.pop.payload.toLong == queueModel.dequeue())
-            ()
           }
         }
         simSuccess()

diff --git a/tester/src/test/scala/spinal/tester/scalatest/SpinalSimVerilatorIoTest.scala b/tester/src/test/scala/spinal/tester/scalatest/SpinalSimVerilatorIoTest.scala
@@ -81,28 +81,24 @@ class SpinalSimVerilatorIoTest extends FunSuite {
         that #= value
         sleep(1)
         assert(that.toBoolean == value, that.getName() + " " + value)
-        ()
       }
 
       def checkInt(value : Int, that : BitVector): Unit ={
         that #= value
         sleep(1)
         assert(that.toInt == value, that.getName() + " " + value)
-        ()
       }
 
       def checkLong(value : Long, that : BitVector): Unit ={
         that #= value
         sleep(1)
         assert(that.toLong == value, that.getName() + " " + value)
-        ()
       }
 
       def checkBigInt(value : BigInt, that : BitVector): Unit ={
         that #= value
         sleep(1)
         assert(that.toBigInt == value, that.getName() + " " + value)
-        ()
       }
 
       fork{
@@ -198,7 +194,7 @@ class SpinalSimVerilatorIoTest extends FunSuite {
             sleep(1)
             assert(test.stateOutput.toEnum == e)
             assert(test.stateDecoded.toInt == (1 << e.position))
-            ()
+
           }
         }
-Original file line number
+Diff line change
@@ Expand Up / @@ -146,7 +146,6 @@ class SpinalSimRomTester extends FunSuite { @@
             dut.address.randomize()
             sleep(1)
             assert(dut.data.toBigInt == rom(dut.address.toInt))
-            ()
           }
         }
@@ Expand Down @@