Interactive visualizations of Rust at compile-time and run-time

The HTML Presentation Framework

Tool for generating Clang's JSON Compilation Database files for make-based build systems.

Rust bindings to LLVM. (Mirror of https://gitlab.com/taricorp/llvm-sys.rs/)

hand-written dictionaries from the FreeDict project

🌸 A command-line fuzzy finder

ShellCheck, a static analysis tool for shell scripts

A collection of out-of-tree LLVM passes for teaching and learning

Hardware Description Library

A collection of utilities for Windows Subsystem for Linux

The official SuiteSparse library: a suite of sparse matrix algorithms authored or co-authored by Tim Davis, Texas A&M University.

Verilog-A simulation models

The Berkeley Model and Algorithm Prototyping Platform

An innovative Verilog-A compiler

The next generation of OpenLane, rewritten from scratch with a modular architecture

OpenSTA engine

Icarus Verilog

Open-source version of the Genius Semiconductor Device Simulator

Qucs Project official mirror

ADMS is a code generator for the Verilog-AMS language

📚 Modern C++ Tutorial: C++11/14/17/20 On the Fly | https://changkun.de/modern-cpp/

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

A minimalistic and high-performance SAT solver

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

Seamless operability between C++11 and Python

Tools for working with circuits as graphs in python

Links to tools by subject

Python EDA