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University of Strathclyde
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RFSoC QSFP Data Offload Design with GNU Radio
MEng group project focusing on spectrum allocation efficiency. Providing dataset and scripts to use with RTL-SDR and RFSoC 2x2.
System generator designs for use with PYNQ.
Companion Jupyter Notebooks for the RFSoC-Book.
Python productivity for RFSoC platforms
A collection of Digital Signal Processing notebooks with a wireless communications theme.
A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
Verilog Ethernet components for FPGA implementation
Ethernet Example Projects targeting the Xilinx ZCU102 evaluation board. This repository replaces XAPP1305.
The Strathclyde RFSoC Studio Installer for PYNQ.
Demonstration of Automatic Gain Control with PYNQ
PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
An RFSoC Frequency Planner developed using Python.
PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
A FPGA accelerated SDR receiver using PYNQ-Z2 board and RTL-SDR
PYNQ example of using the RFSoC as a QPSK transceiver.