Skip to content
View dsp8bit's full-sized avatar

Block or report dsp8bit

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

List of awesome semiconductor startups

Python 574 93 Updated Apr 6, 2025

First SDR platform for IoT networks

C 176 29 Updated Feb 20, 2025

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

Verilog 249 48 Updated Aug 21, 2023

Doom classic port to lightweight RISC‑V

C++ 91 26 Updated Jul 25, 2022

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 3,437 815 Updated Jun 27, 2024

Investment Research for Everyone, Everywhere.

Python 41,060 3,648 Updated Apr 20, 2025

Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

Verilog 106 23 Updated Jul 17, 2021