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common: Drop linux/bitops.h from common header
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Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <[email protected]>
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sjg20 authored and trini committed May 19, 2020
1 parent f09f1ec commit cd93d62
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Showing 749 changed files with 940 additions and 6 deletions.
2 changes: 2 additions & 0 deletions arch/arc/include/asm/arcregs.h
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#define ARC_AUX_SUBSYS_BUILD 0xF0

#ifndef __ASSEMBLY__
#include <linux/bitops.h>

/* Accessors for auxiliary registers */
#define read_aux_reg(reg) __builtin_arc_lr(reg)

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1 change: 1 addition & 0 deletions arch/arc/lib/cache.c
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#include <config.h>
#include <common.h>
#include <cpu_func.h>
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/log2.h>
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1 change: 1 addition & 0 deletions arch/arc/lib/cpu.c
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#include <vsprintf.h>
#include <asm/arcregs.h>
#include <asm/cache.h>
#include <linux/bitops.h>

DECLARE_GLOBAL_DATA_PTR;

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1 change: 1 addition & 0 deletions arch/arm/cpu/armv7/mpu_v7r.c
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#include <asm/armv7.h>
#include <asm/system.h>
#include <asm/barriers.h>
#include <linux/bitops.h>
#include <linux/compiler.h>

#include <asm/armv7_mpu.h>
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1 change: 1 addition & 0 deletions arch/arm/cpu/armv7m/cache.c
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#include <asm/armv7m.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <linux/bitops.h>

/* Cache maintenance operation registers */

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1 change: 1 addition & 0 deletions arch/arm/cpu/armv7m/systick-timer.c
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Expand Up @@ -25,6 +25,7 @@
#include <init.h>
#include <time.h>
#include <asm/io.h>
#include <linux/bitops.h>

DECLARE_GLOBAL_DATA_PTR;

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1 change: 1 addition & 0 deletions arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
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#include <env.h>
#include <log.h>
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/arch/fsl_serdes.h>
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1 change: 1 addition & 0 deletions arch/arm/cpu/armv8/generic_timer.c
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#include <command.h>
#include <time.h>
#include <asm/system.h>
#include <linux/bitops.h>

DECLARE_GLOBAL_DATA_PTR;

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1 change: 1 addition & 0 deletions arch/arm/cpu/armv8/hisilicon/pinmux.c
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#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
#include <linux/bitops.h>

struct hi6220_pinmux0_regs *pmx0 =
(struct hi6220_pinmux0_regs *)HI6220_PINMUX0_BASE;
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1 change: 1 addition & 0 deletions arch/arm/cpu/armv8/s32v234/cpu.c
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Expand Up @@ -12,6 +12,7 @@
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <asm/arch/mc_me_regs.h>
#include <linux/bitops.h>
#include "cpu.h"

u32 cpu_mask(void)
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1 change: 1 addition & 0 deletions arch/arm/include/asm/arch-am33xx/cpu.h
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Expand Up @@ -12,6 +12,7 @@

#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
#include <linux/bitops.h>
#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */

#include <asm/arch/hardware.h>
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
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#ifndef __AM43XX_HARDWARE_AM43XX_H
#define __AM43XX_HARDWARE_AM43XX_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/* Module base addresses */

/* L3 Fast Configuration Bandwidth Limiter Base Address */
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-fsl-layerscape/config.h
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#include <linux/kconfig.h>
#include <fsl_ddrc_version.h>

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000

/*
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3 changes: 3 additions & 0 deletions arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
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Expand Up @@ -7,6 +7,9 @@
#define __ARCH_FSL_LSCH2_IMMAP_H__

#include <fsl_immap.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define CONFIG_SYS_IMMR 0x01000000
#define CONFIG_SYS_DCSRBAR 0x20000000
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-hi3660/hi3660.h
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Expand Up @@ -7,6 +7,10 @@
#ifndef __HI3660_H__
#define __HI3660_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define HI3660_UART6_BASE 0xfff32000

#define PMU_REG_BASE 0xfff34000
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-imx8/iomux.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef __ASM_ARCH_IMX8_IOMUX_H__
#define __ASM_ARCH_IMX8_IOMUX_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/*
* We use 64bits value for iomux settings.
* High 32bits are used for padring register value,
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
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#ifndef _ASM_ARCH_IMX8MM_CLOCK_H
#define _ASM_ARCH_IMX8MM_CLOCK_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \
{ \
.rate = (_rate), \
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
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#ifndef _ASM_ARCH_IMX8M_CLOCK_H
#define _ASM_ARCH_IMX8M_CLOCK_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

enum pll_clocks {
ANATOP_ARM_PLL,
ANATOP_GPU_PLL,
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-meson/axg.h
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Expand Up @@ -7,6 +7,10 @@
#ifndef __AXG_H__
#define __AXG_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define AXG_AOBUS_BASE 0xff800000
#define AXG_PERIPHS_BASE 0xff634400
#define AXG_HIU_BASE 0xff63c000
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-meson/g12a.h
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Expand Up @@ -7,6 +7,10 @@
#ifndef __G12A_H__
#define __G12A_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define G12A_AOBUS_BASE 0xff800000
#define G12A_PERIPHS_BASE 0xff634400
#define G12A_HIU_BASE 0xff63c000
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-meson/gx.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef __GX_H__
#define __GX_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define GX_FIRMWARE_MEM_SIZE 0x1000000

#define GX_AOBUS_BASE 0xc8100000
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-meson/sd_emmc.h
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Expand Up @@ -7,6 +7,10 @@
#define __SD_EMMC_H__

#include <mmc.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif


#define SDIO_PORT_A 0
#define SDIO_PORT_B 1
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1 change: 1 addition & 0 deletions arch/arm/include/asm/arch-mx6/imx-regs.h
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Expand Up @@ -372,6 +372,7 @@
#include <asm/mach-imx/regs-lcdif.h>
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
#include <linux/bitops.h>

/* only for i.MX6SX/UL */
#define WDOG3_BASE_ADDR (((is_mx6ul() || is_mx6ull()) ? \
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1 change: 1 addition & 0 deletions arch/arm/include/asm/arch-mx7/imx-regs.h
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/mach-imx/regs-lcdif.h>
#include <asm/types.h>
#include <linux/bitops.h>

extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);

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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-mx7/mx7-ddr.h
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Expand Up @@ -10,6 +10,10 @@
#ifndef __ASM_ARCH_MX7_DDR_H__
#define __ASM_ARCH_MX7_DDR_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/* DDRC Registers (DDRC_IPS_BASE_ADDR) */
struct ddrc {
u32 mstr; /* 0x0000 */
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/cru.h
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Expand Up @@ -7,6 +7,10 @@
#ifndef _ROCKCHIP_CLOCK_H
#define _ROCKCHIP_CLOCK_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#if defined(CONFIG_ROCKCHIP_RK3288)
# include <asm/arch-rockchip/cru_rk3288.h>
#elif defined(CONFIG_ROCKCHIP_RK3399)
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/cru_rk3128.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef _ASM_ARCH_CRU_RK3128_H
#define _ASM_ARCH_CRU_RK3128_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define MHz 1000000
#define OSC_HZ (24 * MHz)

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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/cru_rk3368.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef _ASM_ARCH_CRU_RK3368_H
#define _ASM_ARCH_CRU_RK3368_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/* RK3368 clock numbers */
enum rk3368_pll_id {
APLLB,
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/cru_rv1108.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef _ASM_ARCH_CRU_RV1108_H
#define _ASM_ARCH_CRU_RV1108_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define OSC_HZ (24 * 1000 * 1000)

#define APLL_HZ (600 * 1000000)
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef __ASM_ARCH_DDR_RK3368_H__
#define __ASM_ARCH_DDR_RK3368_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/*
* The RK3368 DDR PCTL differs from the incarnation in the RK3288 only
* in a few details. Most notably, it has an additional field to track
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/grf_rk3368.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef _ASM_ARCH_GRF_RK3368_H
#define _ASM_ARCH_GRF_RK3368_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

struct rk3368_grf {
u32 gpio1a_iomux;
u32 gpio1b_iomux;
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
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Expand Up @@ -6,6 +6,10 @@
#ifndef _ASM_ARCH_LVDS_RK3288_H
#define _ASM_ARCH_LVDS_RK3288_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define RK3288_LVDS_CH0_REG0 0x00
#define RK3288_LVDS_CH0_REG0_LVDS_EN BIT(7)
#define RK3288_LVDS_CH0_REG0_TTL_EN BIT(6)
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
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Expand Up @@ -7,6 +7,10 @@
#define _ASM_ARCH_SDRAM_PCTL_PX30_H
#include <asm/arch-rockchip/sdram_common.h>

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

struct ddr_pctl_regs {
u32 pctl[30][2];
};
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
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Expand Up @@ -8,6 +8,10 @@
#include <asm/arch-rockchip/sdram_common.h>
#include <asm/arch-rockchip/sdram_phy_ron_rtt_px30.h>

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

struct ddr_phy_regs {
u32 phy[5][2];
};
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
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Expand Up @@ -5,6 +5,10 @@
#ifndef _ASM_ARCH_SDRAM_RK322X_H
#define _ASM_ARCH_SDRAM_RK322X_H

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

struct rk322x_sdram_channel {
/*
* bit width in address, eg:
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3 changes: 3 additions & 0 deletions arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
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Expand Up @@ -7,6 +7,9 @@
#define _ASM_ARCH_SDRAM_RK3399_H
#include <asm/arch-rockchip/sdram_common.h>
#include <asm/arch-rockchip/sdram_msch.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

struct rk3399_ddr_pctl_regs {
u32 denali_ctl[332];
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4 changes: 4 additions & 0 deletions arch/arm/include/asm/arch-stih410/sdhci.h
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Expand Up @@ -7,6 +7,10 @@
#ifndef __STI_SDHCI_H__
#define __STI_SDHCI_H__

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

#define FLASHSS_MMC_CORE_CONFIG_1 0x400
#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ BIT(24)
#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN BIT(12)
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5 changes: 5 additions & 0 deletions arch/arm/include/asm/arch-stm32f4/stm32_pwr.h
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Expand Up @@ -5,6 +5,11 @@
*/

#ifndef __STM32_PWR_H_
#define __STM32_PWR_H_

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/*
* Offsets of some PWR registers
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5 changes: 5 additions & 0 deletions arch/arm/include/asm/arch-stm32f7/stm32_pwr.h
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Expand Up @@ -5,6 +5,11 @@
*/

#ifndef __STM32_PWR_H_
#define __STM32_PWR_H_

#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif

/*
* Offsets of some PWR registers
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