Merge git://git.denx.de/u-boot-x86

ffontaine · Jul 20, 2018 · e0ed833 · e0ed833
2 parents 0dd1fc0 + 05855fd
commit e0ed833
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Showing 46 changed files with 351 additions and 210 deletions.
diff --git a/arch/Kconfig b/arch/Kconfig
@@ -118,6 +118,8 @@ config X86
 	imply DM_SPI_FLASH
 	imply DM_USB
 	imply DM_VIDEO
+	imply SYSRESET
+	imply SYSRESET_X86
 	imply CMD_FPGA_LOADMK
 	imply CMD_GETTIME
 	imply CMD_IO

diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
@@ -55,9 +55,3 @@ int arch_misc_init(void)
 
 	return 0;
 }
-
-void reset_cpu(ulong addr)
-{
-	/* cold reset */
-	x86_full_reset();
-}
diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c
@@ -27,9 +27,3 @@ int arch_misc_init(void)
 
 	return 0;
 }
-
-void reset_cpu(ulong addr)
-{
-	/* cold reset */
-	x86_full_reset();
-}
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
@@ -24,6 +24,7 @@
 #include <errno.h>
 #include <malloc.h>
 #include <syscon.h>
+#include <asm/acpi.h>
 #include <asm/acpi_s3.h>
 #include <asm/acpi_table.h>
 #include <asm/control_regs.h>
@@ -75,37 +76,11 @@ int x86_init_cache(void)
 }
 int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	printf("resetting ...\n");
-
-	/* wait 50 ms */
-	udelay(50000);
-	disable_interrupts();
-	reset_cpu(0);
-
-	/*NOTREACHED*/
-	return 0;
-}
-
 void  flush_cache(unsigned long dummy1, unsigned long dummy2)
 {
 	asm("wbinvd\n");
 }
 
-__weak void reset_cpu(ulong addr)
-{
-	/* Do a hard reset through the chipset's reset control register */
-	outb(SYS_RST | RST_CPU, IO_PORT_RESET);
-	for (;;)
-		cpu_hlt();
-}
-
-void x86_full_reset(void)
-{
-	outb(FULL_RST | SYS_RST | RST_CPU, IO_PORT_RESET);
-}
-
 /* Define these functions to allow ehch-hcd to function */
 void flush_dcache_range(unsigned long start, unsigned long stop)
 {
@@ -204,17 +179,32 @@ __weak void board_final_cleanup(void)
 
 int last_stage_init(void)
 {
+	struct acpi_fadt __maybe_unused *fadt;
+
 	board_final_cleanup();
 
-#if CONFIG_HAVE_ACPI_RESUME
-	struct acpi_fadt *fadt = acpi_find_fadt();
+#ifdef CONFIG_HAVE_ACPI_RESUME
+	fadt = acpi_find_fadt();
 
-	if (fadt != NULL && gd->arch.prev_sleep_state == ACPI_S3)
+	if (fadt && gd->arch.prev_sleep_state == ACPI_S3)
 		acpi_resume(fadt);
 #endif
 
 	write_tables();
 
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+	fadt = acpi_find_fadt();
+
+	/* Don't touch ACPI hardware on HW reduced platforms */
+	if (fadt && !(fadt->flags & ACPI_FADT_HW_REDUCED_ACPI)) {
+		/*
+		 * Other than waiting for OSPM to request us to switch to ACPI
+		 * mode, do it by ourselves, since SMI will not be triggered.
+		 */
+		enter_acpi_mode(fadt->pm1a_cnt_blk);
+	}
+#endif
+
 	return 0;
 }
 #endif

diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <sysreset.h>
 #include <asm/pci.h>
 #include <asm/cpu.h>
 #include <asm/processor.h>
@@ -138,17 +139,17 @@ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev,
 	case ME_HFS_ACK_RESET:
 		/* Non-power cycle reset */
 		set_global_reset(dev, 0);
-		reset_cpu(0);
+		sysreset_walk_halt(SYSRESET_COLD);
 		break;
 	case ME_HFS_ACK_PWR_CYCLE:
 		/* Power cycle reset */
 		set_global_reset(dev, 0);
-		x86_full_reset();
+		sysreset_walk_halt(SYSRESET_COLD);
 		break;
 	case ME_HFS_ACK_GBL_RESET:
 		/* Global reset */
 		set_global_reset(dev, 1);
-		x86_full_reset();
+		sysreset_walk_halt(SYSRESET_COLD);
 		break;
 	case ME_HFS_ACK_S3:
 	case ME_HFS_ACK_S4:

diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
@@ -18,6 +18,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <syscon.h>
+#include <sysreset.h>
 #include <asm/cpu.h>
 #include <asm/processor.h>
 #include <asm/gpio.h>
@@ -497,7 +498,7 @@ int dram_init(void)
 	/* If MRC data is not found we cannot continue S3 resume. */
 	if (pei_data->boot_mode == PEI_BOOT_RESUME && !pei_data->mrc_input) {
 		debug("Giving up in sdram_initialize: No MRC data\n");
-		reset_cpu(0);
+		sysreset_walk_halt(SYSRESET_COLD);
 	}
 
 	/* Pass console handler in pei_data */

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
@@ -156,12 +156,6 @@ int print_cpuinfo(void)
 }
 #endif
 
-void reset_cpu(ulong addr)
-{
-	/* cold reset */
-	x86_full_reset();
-}
-
 int arch_early_init_r(void)
 {
 	qemu_chipset_init();

diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
@@ -67,7 +67,7 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
 	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
 	fadt->reset_reg.addrl = IO_PORT_RESET;
 	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = SYS_RST | RST_CPU;
+	fadt->reset_value = SYS_RST | RST_CPU | FULL_RST;
 
 	fadt->x_firmware_ctl_l = (u32)facs;
 	fadt->x_firmware_ctl_h = 0;

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
@@ -270,12 +270,6 @@ int print_cpuinfo(void)
 	return default_print_cpuinfo();
 }
 
-void reset_cpu(ulong addr)
-{
-	/* cold reset */
-	x86_full_reset();
-}
-
 static void quark_pcie_init(void)
 {
 	u32 val;

diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile
@@ -2,5 +2,5 @@
 #
 # Copyright (c) 2017 Intel Corporation
 
-obj-y += car.o tangier.o sdram.o
+obj-y += car.o tangier.o sdram.o sysreset.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
diff --git a/arch/x86/cpu/tangier/sysreset.c b/arch/x86/cpu/tangier/sysreset.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <[email protected]>
+ *
+ * Reset driver for tangier processor
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <sysreset.h>
+#include <asm/scu.h>
+
+static int tangier_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	int value;
+
+	switch (type) {
+	case SYSRESET_WARM:
+		value = IPCMSG_WARM_RESET;
+		break;
+	case SYSRESET_COLD:
+		value = IPCMSG_COLD_RESET;
+		break;
+	default:
+		return -ENOSYS;
+	}
+
+	scu_ipc_simple_command(value, 0);
+
+	return -EINPROGRESS;
+}
+
+static const struct udevice_id tangier_sysreset_ids[] = {
+	{ .compatible = "intel,reset-tangier" },
+	{ }
+};
+
+static struct sysreset_ops tangier_sysreset_ops = {
+	.request = tangier_sysreset_request,
+};
+
+U_BOOT_DRIVER(tangier_sysreset) = {
+	.name = "tangier-sysreset",
+	.id = UCLASS_SYSRESET,
+	.of_match = tangier_sysreset_ids,
+	.ops = &tangier_sysreset_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c
@@ -4,7 +4,6 @@
  */
 
 #include <common.h>
-#include <asm/scu.h>
 #include <asm/u-boot-x86.h>
 
 /*
@@ -24,8 +23,3 @@ int print_cpuinfo(void)
 {
 	return default_print_cpuinfo();
 }
-
-void reset_cpu(ulong addr)
-{
-	scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
-}
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
@@ -12,6 +12,7 @@
 /include/ "skeleton.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"

diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
@@ -12,6 +12,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"

diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
@@ -10,6 +10,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
@@ -5,6 +5,7 @@
 /include/ "skeleton.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"

diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
@@ -5,6 +5,7 @@
 /include/ "skeleton.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"

diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"

diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -12,6 +12,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
@@ -10,6 +10,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
@@ -10,6 +10,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
 #include "skeleton.dtsi"
+#include "reset.dtsi"
 #include "rtc.dtsi"
 #include "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
@@ -85,4 +85,9 @@
 		compatible = "intel,scu-ipc";
 		reg = <0xff009000 0x1000>;
 	};
+
+	reset {
+		compatible = "intel,reset-tangier";
+		u-boot,dm-pre-reloc;
+	};
 };
diff --git a/arch/x86/dts/efi-x86_app.dts b/arch/x86/dts/efi-x86_app.dts
@@ -23,4 +23,9 @@
 	serial: serial {
 		compatible = "efi,uart";
 	};
+
+	reset {
+		compatible = "efi,reset";
+		u-boot,dm-pre-reloc;
+	};
 };
diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts
@@ -10,6 +10,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
 /include/ "skeleton.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
@@ -11,6 +11,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "coreboot_fb.dtsi"