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ARM64, fix issue for PC-relative offset (keystone-engine#291)
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b.cond/cbz/cbnz/tbz/tbnz/adrp
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noword authored and aquynh committed Apr 8, 2017
1 parent 2e6f7c3 commit 51ea7af
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Showing 2 changed files with 4 additions and 4 deletions.
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1133,7 +1133,7 @@ class AArch64Operand : public MCParsedAsmOperand {
return false;

if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
int64_t Val = CE->getValue();
int64_t Val = CE->getValue() - Ctx.getBaseAddress();
int64_t Min = - (4096 * (1LL << (21 - 1)));
int64_t Max = 4096 * ((1LL << (21 - 1)) - 1);
return (Val % 4096) == 0 && Val >= Min && Val <= Max;
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6 changes: 3 additions & 3 deletions llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -219,7 +219,7 @@ AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,

// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4096 - MI.getAddress()) / 4096;
assert(MO.isExpr() && "Unexpected target type!");
const MCExpr *Expr = MO.getExpr();

Expand Down Expand Up @@ -268,7 +268,7 @@ uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue(

// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4 - MI.getAddress()) / 4;
assert(MO.isExpr() && "Unexpected target type!");

MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch19);
Expand Down Expand Up @@ -332,7 +332,7 @@ uint32_t AArch64MCCodeEmitter::getTestBranchTargetOpValue(

// If the destination is an immediate, we have nothing to do.
if (MO.isImm())
return MO.getImm();
return (MO.getImm() * 4 - MI.getAddress()) / 4;
assert(MO.isExpr() && "Unexpected ADR target type!");

MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch14);
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