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ARM: dts: am57xx-evm-reva3: fix typo in mmc2 pinmux offset
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A terrible typo resulted in pinctrl register offsets for
mmc2 being written as 0x37xx instead of 0x34xx as they should
be. So offset 0x3498 was written as 0x3798.

And this was copied over to entries for different mmc2 modes.

This was not caught so far because U-Boot or ROM settings
still work. However, once MMC3 support for WLAN was added, it
resulted in pin clash warnings.

The offsets are correct in am57xx-beagle-x15.dts file and so
only Rev A3 of AM57xx GP EVM is affected.

Tested by read/write tests on eMMC partition on AM57x GP EVM
Rev A3.

Fixes: 7599de1 ("ARM: dts: am57xx-evm-reva3: enable higher speed MMC1/2 modes")
Reported-by: Yan Liu <[email protected]>
Reported-by: Eyal Reizer <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
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@nsekhar
nsekhar committed Aug 18, 2016
1 parent 1c3f4e6 commit 3ffed8b
Showing 1 changed file with 30 additions and 30 deletions.
60 changes: 30 additions & 30 deletions arch/arm/boot/dts/am57xx-evm-reva3.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -102,46 +102,46 @@

mmc2_pins_default: mmc2_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x379c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x37b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x37a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x37a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x37a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x37ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3794, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3798, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
>;
};

mmc2_pins_hs: mmc2_pins_hs {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x379c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x37b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x37a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x37a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x37a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x37ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3794, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3798, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
>;
};

mmc2_pins_ddr_3_3v: pinmux_mmc2_ddr_3_3v_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x379c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x37b0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x37a0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x37a4, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x37a8, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x37ac, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3794, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3798, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
>;
};

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