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1. i2c_uvm i2c_uvm Public

   SystemVerilog 5 2

2. i2c_vip i2c_vip Public

   Forked from muneebullashariff/i2c_vip

   Verification IP for I2C protocol

   SystemVerilog 1 1

3. pulpino_soc_uvm_testbench pulpino_soc_uvm_testbench Public

   Forked from muneebullashariff/pulpino_soc_uvm_testbench

   UVM testbench for verifying the Pulpino SoC

   SystemVerilog 1

4. axi-1 axi-1 Public

   Forked from pulp-platform/axi

   AXI4 and AXI4-Lite synthesizable modules and verification infrastructure

   SystemVerilog 1

5. axi4_vip axi4_vip Public

   Forked from muneebullashariff/axi4_vip

   Verification IP for APB protocol

   SystemVerilog 1

6. UART_Project UART_Project Public

   Verilog 1