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hossamfadeel/README.md

Hello,

  • Current Work: I am focused on designing and implementing digital circuits for FPGA and ASIC systems.
  • Learning: I am expanding my knowledge in the latest advances in computing hardware and algorithmic research.
  • Collaboration: I seek to collaborate on projects that utilize FPGA capabilities and high-speed communication interfaces and protocols to create efficient and reliable systems.
  • Expertise: Feel free to inquire about my experience with ASIC tape-outs, RTL coding, FPGA synthesis, or any aspects related to hardware architecture and design.
  • Contact: You can reach me via GitHub or LinkedIn.

About Me

LinkedIn Badge Website Badge

Welcome to my profile!

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Skills

Programming Languages

  • Verilog
  • SystemVerilog
  • VHDL
  • Python
  • C/C++
  • HLS
  • Tcl
  • Bash

Hardware Platforms

  • FPGAs:
    • AMD (Xilinx) FPGAs
    • Intel (Altera) FPGAs
  • Accelerator Cards:
    • Xilinx Accelerator Cards (U55, U280, U250)
    • Intel Accelerator Cards (BittWare IA-840f)
  • Microcontrollers:
    • STM32 Microcontroller
    • Arduino
    • PIC
    • Cypress PSoC
  • Microprocessors:
    • ARM
    • RISC-V
  • ASICs:
    • MagnaChip 130nm
    • Samsung 65nm

Software and Tools

  • Xilinx (Vitis HLS, Vivado, Vitis)
  • Intel (Quartus Prime, oneAPI)
  • MATLAB
  • Synopsys: Design Compiler, VCS, IC Compiler
  • Cadence: Genus, Xcelium
  • Mentor Graphics ModelSim/Questa/Visualizer

Protocols

  • AXI-4 MM, Lite, and Stream Protocol
  • ABP Bus Protocol
  • PCIe Interface

Other Skills and Technologies

  • High-Level Synthesis (HLS) Flow
  • High-Speed Communication Protocols
  • Zero-Knowledge Proof (ZKP) Technologies
  • Hardware Implementation of SHA-256 Algorithm
  • Hardware Development of Number Theoretic Transform (NTT)
  • Hardware Development of Multi-Scalar Multiplication (MSM)
  • FPGA-Based Underwater Sonar Devices
  • Lossless and Near-Lossless Sonar Audio and RAW Data Compression using IMA ADPCM Algorithm
  • Modified JPEG-LS (JPEG-Lossless Image Compression Standard)
  • FPGA-to-FPGA Communication Using Xilinx Aurora IP
  • Ethernet-Based Data Transfer between PC Software and FPGA-Based Sonar Hardware Devices using LWIP
  • Custom USB HID Implementation
  • Debugging and Redesigning VHDL Code for Variable Frequency Generation and Control of Sonar Acoustic Camera Devices based on Xilinx Artix-7 FPGA
  • MATLAB for Various Tasks, Including Verification of I2S Protocol and FFT Output Comparison
  • RTL Design and Verification of Various Digital Circuits and Systems
  • FPGA and GPU Acceleration for ZKP Systems

Personal Projects

Interests

  • Exploring new technology stacks and building innovative solutions.
  • Reading and writing technical blogs.
  • Participating in hackathons, meetups, and technology events.

Connect with Me

LinkedIn GitHub Website


Show some ❤️ by starring some of my repositories!

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