Bug 1650621: mask the shift count when considering direct lowering of…

… i64x2.shr_s; r=jseward

When lowering i64x2.shr_s, we can emit a simpler sequence if the shift count is
constant and less than 32; otherwise, a bigger code sequence needs to be
generated. When making this decision, the shift count wasn't masked, making it
so that a negative shift count would satisfy this condition but could be
greater than 32, in the immediate case. Masking the shift count solves the
issue and makes it also possible to use the constant code sequence for larger
shift counts.

The mask value of 63 is appropriate per specification, since we're operating on
an i64x2 register.

Differential Revision: https://phabricator.services.mozilla.com/D82884

js/src/jit-test/tests/wasm/simd/ad-hack.js

@@ -1044,6 +1044,8 @@ var ins = wasmEvalText(`
       (v128.store (i32.const 0) (i64x2.shr_s (v128.load (i32.const 16)) (i32.const 63))))
     (func (export "shr_i64x2_64")
       (v128.store (i32.const 0) (i64x2.shr_s (v128.load (i32.const 16)) (i32.const 64))))
+    (func (export "shr_i64x2_-1")
+      (v128.store (i32.const 0) (i64x2.shr_s (v128.load (i32.const 16)) (i32.const -1))))
     (func (export "shr_u64x2") (param $count i32)
       (v128.store (i32.const 0) (i64x2.shr_u (v128.load (i32.const 16)) (local.get $count))))
     (func (export "shr_u64x2_27")

js/src/jit/x86-shared/MacroAssembler-x86-shared.cpp

@@ -260,7 +260,7 @@ bool MacroAssembler::MustMaskShiftCountSimd128(wasm::SimdOp op, int32_t* mask) {
 }
 
 bool MacroAssembler::MustScalarizeShiftSimd128(wasm::SimdOp op, Imm32 imm) {
-  return op == wasm::SimdOp::I64x2ShrS && imm.value > 31;
+  return op == wasm::SimdOp::I64x2ShrS && (imm.value & 63) > 31;
 }
 #endif