Adding test

Signed-off-by: David Shah <[email protected]>

misc/caminit/picam_init.cc

@@ -139,7 +139,7 @@ static void write_cmos_sensor(uint16_t addr, uint8_t value) {
 	i2c_stop();
 }
 
-const int framelength = 1332;
+const int framelength = 666;
 const int linelength = 3448;
 
 static void cam_init() {
@@ -167,16 +167,16 @@ static void cam_init() {
 	write_cmos_sensor(0x0169,  0x00); //Y_ADD_STA_A[7:0]
 	write_cmos_sensor(0x016A,  0x09); //Y_ADD_END_A[11:8]
 	write_cmos_sensor(0x016B,  0x9F); //Y_ADD_END_A[7:0]
-	write_cmos_sensor(0x016C,  0x06); //x_output_size[11:8] = 1640
-	write_cmos_sensor(0x016D,  0x68); //x_output_size[7:0]
-	write_cmos_sensor(0x016E,  0x04); //y_output_size[11:8] = 1232
-	write_cmos_sensor(0x016F,  0xD0); //y_output_size[7:0]
+	write_cmos_sensor(0x016C,  0x02); //x_output_size[11:8] = 640
+	write_cmos_sensor(0x016D,  0x80); //x_output_size[7:0]
+	write_cmos_sensor(0x016E,  0x01); //y_output_size[11:8] = 480
+	write_cmos_sensor(0x016F,  0xE0); //y_output_size[7:0]
 	write_cmos_sensor(0x0170,  0x01); //X_ODD_INC_A
 	write_cmos_sensor(0x0171,  0x01); //Y_ODD_INC_A
-	write_cmos_sensor(0x0174,  0x01); //BINNING_MODE_H_A = x2-binning
-	write_cmos_sensor(0x0175,  0x01); //BINNING_MODE_V_A = x2-binning
-	write_cmos_sensor(0x018C,  0x0A); //CSI_DATA_FORMAT_A[15:8]
-	write_cmos_sensor(0x018D,  0x0A); //CSI_DATA_FORMAT_A[7:0]
+	write_cmos_sensor(0x0174,  0x02); //BINNING_MODE_H_A = x4-binning
+	write_cmos_sensor(0x0175,  0x02); //BINNING_MODE_V_A = x4-binning
+	write_cmos_sensor(0x018C,  0x08); //CSI_DATA_FORMAT_A[15:8]
+	write_cmos_sensor(0x018D,  0x08); //CSI_DATA_FORMAT_A[7:0]
 	write_cmos_sensor(0x0301,  0x05); //VTPXCK_DIV
 	write_cmos_sensor(0x0303,  0x01); //VTSYCK_DIV
 	write_cmos_sensor(0x0304,  0x03); //PREPLLCK_VT_DIV
@@ -186,7 +186,7 @@ static void cam_init() {
 	write_cmos_sensor(0x0309,  0x0A); //OPPXCK_DIV
 	write_cmos_sensor(0x030B,  0x01); //OPSYCK_DIV
 	write_cmos_sensor(0x030C,  0x00); //PLL_OP_MPY[10:8]
-	write_cmos_sensor(0x030D,  0x2E); //PLL_OP_MPY[7:0]
+	write_cmos_sensor(0x030D,  0x08); //PLL_OP_MPY[7:0]
 	write_cmos_sensor(0x455E,  0x00); //??
 	write_cmos_sensor(0x471E,  0x4B); //??
 	write_cmos_sensor(0x4767,  0x0F); //??

verilog_cores/test/icebreaker/.gitignore

@@ -0,0 +1,6 @@
+*.blif
+*.json
+*.asc
+*.bin
+*.rpt
+*.log

verilog_cores/test/icebreaker/Makefile

@@ -0,0 +1,31 @@
+SOURCES = $(wildcard ../../csi/*.v ../../phy/*.v ../../link/*.v top.v)
+PROJ=camera
+PIN_DEF=icecam.pcf
+DEVICE=up5k
+
+all: $(PROJ).rpt $(PROJ).bin
+
+%.blif: $(SOURCES)
+	yosys -p 'synth_ice40 -top top -blif $@' $(SOURCES)
+
+%.asc: $(PIN_DEF) %.blif
+	arachne-pnr -d 5k -o $@ -p $^
+
+%.bin: %.asc
+	icepack $< $@
+
+%.rpt: %.asc
+	icetime -d $(DEVICE) -mtr $@ $<
+
+prog: $(PROJ).bin
+	iceprog $<
+
+sudo-prog: $(PROJ).bin
+	@echo 'Executing prog as root!!!'
+	sudo iceprog $<
+
+clean:
+	rm -f $(PROJ).blif $(PROJ).asc $(PROJ).rpt $(PROJ).bin
+
+.SECONDARY:
+.PHONY: all prog clean

verilog_cores/test/icebreaker/icecam.pcf

@@ -0,0 +1,24 @@
+set_io mpsse_sda 6 #FTDI D0
+set_io mpsse_scl 9 #FTDI D1
+
+set_io cam_enable 3 #P1A7
+set_io cam_sda 34 #P1B3
+set_io cam_scl 28 #P1B10
+
+set_io dphy_clk 32 #P1B9
+set_io dphy_data[0] 42 #P1B7
+set_io dphy_data[1] 43 #P1B1
+set_io dphy_lp 48 #P1A8
+
+set_io BTN_N      10
+set_io LEDR_N     11
+set_io LEDG_N     37
+
+set_io LED2       27
+set_io LED3       25
+set_io LED5       21
+set_io BTN2       19
+set_io LED1       26
+set_io LED4       23
+set_io BTN1       20
+set_io BTN3       18

verilog_cores/test/icebreaker/top.v

@@ -0,0 +1,74 @@
+/**
+ * The MIT License
+ * Copyright (c) 2018 David Shah
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+module top(input mpsse_sda, mpsse_scl, inout cam_sda, cam_scl, output cam_enable,
+		   input dphy_clk, input [1:0] dphy_data, input dphy_lp,
+		   output LEDR_N, LEDG_N, LED1, LED2, LED3, LED4, LED5,
+		   input BTN_N, BTN1, BTN2, BTN3);
+
+	wire areset = !BTN_N;
+	assign cam_scl = mpsse_scl ? 1'bz : 1'b0;
+    assign cam_sda = mpsse_sda ? 1'bz : 1'b0;
+	assign cam_enable = 1'b1;
+	wire sys_clk;
+	wire in_line, in_frame;
+	wire [31:0] payload_data;
+	wire payload_valid;
+
+	csi_rx_ice40 #(
+		.LANES(2), // lane count
+		.PAIRSWAP(2'b10), // lane pair swap (inverts data for given  lane)
+
+		.VC(2'b00), // MIPI CSI-2 "virtual channel"
+		.FS_DT(6'h00), // Frame start data type
+		.FE_DT(6'h00), // Frame end data type
+		.VIDEO_DT(6'h2A), // Video payload data type (6'h2A = 8-bit raw, 6'h2B = 10-bit raw, 6'h2C = 12-bit raw)
+		.MAX_LEN(8192) // Max expected packet len, used as timeout
+	) csi_rx_i (
+		.dphy_clk_lane(dphy_clk),
+		.dphy_data_lane(dphy_data),
+		.dphy_lp_sense(dphy_lp),
+
+		.areset(areset),
+
+		.word_clk(sys_clk),
+		.payload_data(payload_data),
+		.payload_enable(payload_valid),
+		.payload_frame(),
+
+		.vsync(),
+		.in_line(in_line),
+		.in_frame(in_frame)
+	);
+
+
+	reg [22:0] sclk_div;
+	always @(posedge sys_clk)
+		sclk_div <= sclk_div + 1'b1;
+
+	assign {LEDR_N, LEDG_N} = ~(sclk_div[22:21]);
+	assign LED1 = in_frame;
+	assign LED2 = !in_frame;
+	assign {LED5, LED4, LED3} = payload_valid ? payload_data[7:5] : 3'b000;
+endmodule