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mfd: sec-core: Disable buck voltage reset on watchdog falling edge
The WRSTBI bit (disabled by default but enabled by bootloader), when set, is responsible for resetting voltages to default values of certain bucks on falling edge of Warm Reset Input pin from AP. However on some boards (with S2MPS13) the pin is pulled down so any suspend will effectively trigger the reset of bucks supplying the power to the little and big cores. In the same time when resuming, these bucks must provide voltage greater or equal to voltage before suspend to match the frequency chosen by cpufreq. If voltage (default value of voltage after reset) is lower than one set by cpufreq before suspend, then system will hang during resuming. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reported-by: Bartlomiej Zolnierkiewicz <[email protected]> Tested-by: Bartlomiej Zolnierkiewicz <[email protected]> Signed-off-by: Lee Jones <[email protected]>
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