A Fully Open-Source Verilog-to-PCB Flow

Icarus Verilog can convert Verilog Code to VHDL Code

PicoRV32 - A Size-Optimized RISC-V CPU

SERV - The SErial RISC-V CPU

Work in progress distributed system that simplifies the orchestration of containers and virtual machines.

Libelf is a simple library to read ELF files.

Build your hardware, easily!

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Linsn RV901T HUB75 LED "Receiver Card" Reverse Engineering

Complete flight control system designed from scratch. Hardware designed with KiCad.

Course materials for Modern Binary Exploitation by RPISEC