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1. detect-SCC detect-SCC Public

   Detecting Strongly Connected Components for Scholarly Data

   C++ 2

2. abc-itmap abc-itmap Public

   C

3. mata mata Public

   Python

4. OpenFPGA OpenFPGA Public

   Forked from lnis-uofu/OpenFPGA

   An Open-source FPGA IP Generator

   Verilog

5. OpenROAD OpenROAD Public

   Forked from The-OpenROAD-Project/OpenROAD

   OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

   Verilog