Fix accessPage address translation algorithm

jpr98 · Feb 8, 2020 · df0ac5a · df0ac5a
1 parent 21c1bc8
commit df0ac5a
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/mem/memory.go b/mem/memory.go
@@ -41,12 +41,12 @@ func (m *memory) AccessPage(pid string, address int) (int, bool) {
 		displacement = m.PageSize
 	}
 
-	for _, page := range m.pages {
+	for pageFrame, page := range m.pages {
 		if page.pid == pid && page.virtualAddress == pageNumber {
 			if m.policy.LRU {
 				// incrementar
 			}
-			realAddress := page.virtualAddress*m.PageSize + displacement
+			realAddress := pageFrame*m.PageSize + displacement
 			return realAddress, true
 		}
 	}