https://bugzilla.tianocore.org/show_bug.cgi?id=3525
After PciSegmentLib using Dynamic PCD for Pcie base address such
long delay found in FSP. The root cause is some of the PCD service
PPIs not shadowed to memory and flash cache may have been disabled
in NotifyPhase stage. Solution is to shadow all PCD service PPIs
to memory.
Signed-off-by: GregX Yeh <[email protected]>
Cc: Jian J Wang <[email protected]>
Cc: Hao A Wu <[email protected]>
Cc: Dandan Bi <[email protected]>
Cc: Liming Gao <[email protected]>
Reviewed-by: Dandan Bi <[email protected]>
Reviewed-by: Jian J Wang <[email protected]>
