IntelFsp2Pkg: Clean up source files

1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <[email protected]>
kontais · Jun 28, 2018 · e37bb20 · e37bb20
1 parent 1c2f052
commit e37bb20
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Showing 16 changed files with 45 additions and 45 deletions.
diff --git a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
@@ -1,7 +1,7 @@
 /** @file
   Source file for FSP notify phase PEI module
 
-  Copyright (c) 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -16,11 +16,11 @@
 /**
 
    This function waits for FSP notify.
-    
+
    @param This          Entry point for DXE IPL PPI.
    @param PeiServices   General purpose services available to every PEIM.
    @param HobList       Address to the Pei HOB list.
-   
+
    @return EFI_SUCCESS              This function never returns.
 
 **/
@@ -51,11 +51,11 @@ CONST EFI_PEI_PPI_DESCRIPTOR gEndOfPeiSignalPpi = {
 /**
 
    This function waits for FSP notify.
-    
+
    @param This          Entry point for DXE IPL PPI.
    @param PeiServices   General purpose services available to every PEIM.
    @param HobList       Address to the Pei HOB list.
-   
+
    @return EFI_SUCCESS              This function never returns.
 
 **/

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Sec Core for FSP
 #
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
@@ -44,7 +44,7 @@
 
 [Packages]
   MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec  
+  MdeModulePkg/MdeModulePkg.dec
   IntelFsp2Pkg/IntelFsp2Pkg.dec
 
 [LibraryClasses]

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Sec Core for FSP
 #
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
@@ -39,7 +39,7 @@
 
 [Packages]
   MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec  
+  MdeModulePkg/MdeModulePkg.dec
   IntelFsp2Pkg/IntelFsp2Pkg.dec
 
 [LibraryClasses]

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
@@ -1,7 +1,7 @@
 ;; @file
 ;  Provide FSP API entry points.
 ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -116,18 +116,18 @@ ASM_PFX(FspApiCommonContinue):
   sidt    [esp]
 
 
-  ;  Get Stackbase and StackSize from FSPM_UPD Param 
-  mov    edx, [esp + API_PARAM1_OFFSET] 
+  ;  Get Stackbase and StackSize from FSPM_UPD Param
+  mov    edx, [esp + API_PARAM1_OFFSET]
   cmp    edx, 0
-  jnz    FspStackSetup  
+  jnz    FspStackSetup
 
   ; Get UPD default values if FspmUpdDataPtr (ApiParam1) is null
   push   eax
   call   ASM_PFX(AsmGetFspInfoHeader)
   mov    edx, [eax + FSP_HEADER_IMGBASE_OFFSET]
   add    edx, [eax + FSP_HEADER_CFGREG_OFFSET]
   pop    eax
-  
+
   FspStackSetup:
   mov    edi, [edx + FSPM_UPD_COMMON.StackBase]
   mov    ecx, [edx + FSPM_UPD_COMMON.StackSize]

diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -154,7 +154,7 @@ FspGlobalDataInit (
   // Set API calling mode
   //
   SetFspApiCallingIndex (ApiIdx);
-  
+
   //
   // Set UPD pointer
   //

diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -33,7 +33,7 @@ FspApiCallingCheck (
 
   Status = EFI_SUCCESS;
   FspData = GetFspGlobalDataPointer ();
-  
+
   if (ApiIdx == NotifyPhaseApiIndex) {
     //
     // NotifyPhase check
@@ -92,6 +92,6 @@ FspApiCallingCheck (
       SetFspApiCallingIndex (ApiIdx);
     }
   }
-  
+
   return Status;
 }
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -133,7 +133,7 @@ SecStartup (
 
   //
   // Call PeiCore Entry
-  //  
+  //
   PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);
 
   //
@@ -177,7 +177,7 @@ SecTemporaryRamSupport (
 
   HeapSize   = CopySize * PcdGet8 (PcdFspHeapSizePercentage) / 100 ;
   StackSize  = CopySize - HeapSize;
-    
+
   OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
   NewHeap = (VOID*)((UINTN)PermanentMemoryBase + StackSize);
 

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -2,7 +2,7 @@
   Intel FSP API definition from Intel Firmware Support Package External
   Architecture Specification v2.0.
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -216,7 +216,7 @@ EFI_STATUS
   and defined for each FSP binary. This will be documented in Integration guide with
   each FSP release.
   After FspMemInit completes its execution, it passes the pointer to the HobList and
-  returns to the boot loader from where it was called. BootLoader is responsible to 
+  returns to the boot loader from where it was called. BootLoader is responsible to
   migrate it's stack and data to Memory.
   FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
   complete the silicon initialization and provides bootloader an opportunity to get

diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
@@ -2,7 +2,7 @@
   Intel FSP Header File definition from Intel Firmware Support Package External
   Architecture Specification v2.0.
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -144,7 +144,7 @@ typedef struct {
   ///
   UINT8   Reserved;
   ///
-  /// Byte 0x0A: FSP producer identification string 
+  /// Byte 0x0A: FSP producer identification string
   ///
   CHAR8   FspProducerId[6];
   ///

diff --git a/IntelFsp2Pkg/Include/Library/FspCommonLib.h b/IntelFsp2Pkg/Include/Library/FspCommonLib.h
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -268,7 +268,7 @@ SetFspApiCallingIndex (
 
 /**
   This function gets FSP Phase StatusCode.
-  
+
   @retval StatusCode
 **/
 UINT32

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.dec
@@ -1,7 +1,7 @@
 ## @file
 # Provides driver and definitions to build fsp in EDKII bios.
 #
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
 # This program and the accompanying materials are licensed and made available under
 # the terms and conditions of the BSD License that accompanies this distribution.
 # The full text of the license may be found at
@@ -20,7 +20,7 @@
 
 [Includes]
   Include
-  
+
 [LibraryClasses]
   ##  @libraryclass  Provides cache-as-ram support.
   CacheAsRamLib|Include/Library/CacheAsRamLib.h
@@ -39,7 +39,7 @@
 
   ##  @libraryclass  Provides FSP switch stack function.
   FspSwitchStackLib|Include/Library/FspSwitchStackLib.h
-  
+
   ##  @libraryclass  Provides FSP platform sec related actions.
   FspSecPlatformLib|Include/Library/FspSecPlatformLib.h
 
@@ -74,7 +74,7 @@
   # x % of FSP temporary memory will be used for heap
   # (100 - x) % of FSP temporary memory will be used for stack
   gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage    |        50| UINT8|0x10000004
-  
+
 [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]
   gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UINT32|0x46530000
   gIntelFsp2PkgTokenSpaceGuid.PcdBootLoaderEntry         |0xFFFFFFE4|UINT32|0x46530100
diff --git a/IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf b/IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf
@@ -1,6 +1,6 @@
 ## @file
-#  Instance of FspCommonLib 
-#  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#  Instance of FspCommonLib
+#  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License

diff --git a/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c b/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -516,7 +516,7 @@ FspApiReturnStatusReset (
   )
 {
   volatile BOOLEAN  LoopUntilReset;
-  
+
   LoopUntilReset = TRUE;
   DEBUG ((DEBUG_INFO, "FSP returning control to Bootloader with reset required return status %x\n",FspResetType));
   ///

diff --git a/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformMemory.c b/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -48,12 +48,12 @@ FspGetResourceDescriptorByOwner (
     if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
       if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) && \
           (CompareGuid (&Hob.ResourceDescriptor->Owner, OwnerGuid))) {
-        return  Hob.ResourceDescriptor;                     
+        return  Hob.ResourceDescriptor;
       }
     }
     Hob.Raw = GET_NEXT_HOB (Hob);
   }
-  
+
   return NULL;
 }
 

diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm
@@ -2,7 +2,7 @@
 ;  This is the code that goes from real-mode to protected mode.
 ;  It consumes the reset vector, configures the stack.
 ;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -124,4 +124,4 @@ ASM_PFX(ProtectedModeEntryLinearAddress):
 ASM_PFX(ProtectedModeEntryLinearOffset):
   DD      ASM_PFX(ProtectedModeEntryPoint)  ; Offset of our 32 bit code
   DW      LINEAR_CODE_SEL
-  
+
diff --git a/IntelFsp2Pkg/Tools/PatchFv.py b/IntelFsp2Pkg/Tools/PatchFv.py
@@ -1,6 +1,6 @@
 ## @ PatchFv.py
 #
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
 # This program and the accompanying materials are licensed and made available under
 # the terms and conditions of the BSD License that accompanies this distribution.
 # The full text of the license may be found at
@@ -136,8 +136,8 @@ def parseFvInfFile (self, infFile):
         fvInfo['Offset']  = self.getFvOffsetInFd(fvFile)
         fvInfo['Size']    = readDataFromFile (fvFile, 0x20, 4)
         fdIn        = open(infFile, "r")
-        rptLines    = fdIn.readlines() 
-        fdIn.close()       
+        rptLines    = fdIn.readlines()
+        fdIn.close()
         fvInfo['Base'] = 0
         for rptLine in rptLines:
             match = re.match("^EFI_BASE_ADDRESS\s*=\s*(0x[a-fA-F0-9]+)", rptLine)
@@ -289,7 +289,7 @@ def getFvOffsetInFd(self, fvFile):
     #
     def parseInfFile(self, infFile):
         #
-        # Get FV offset and search EFI_BASE_ADDRESS in the FD file 
+        # Get FV offset and search EFI_BASE_ADDRESS in the FD file
         # then assign the value of EFI_BASE_ADDRESS to fdBase
         #
         fvOffset    = self.getFvOffsetInFd(infFile[0:-4] + ".Fv")