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1. riscv riscv Public

   Forked from ultraembedded/riscv

   RISC-V CPU Core (RV32IM)

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2. VSDFlow-Steps VSDFlow-Steps Public

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   In this repository, I have discussed the steps with the screenshots to install opensource EDA Tools for VLSI Design.

3. OpenMIPS_all OpenMIPS_all Public

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   A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions, over 100 hw/sw tests, and full ISA compliance

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4. 100_days_of_RTL 100_days_of_RTL Public

   This is a repository for 100Days of RTL which consists of various Digital design circuits in verilog and verification done in system verilog

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5. Resume Resume Public

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6. OpenSTA OpenSTA Public

   Forked from The-OpenROAD-Project/OpenSTA

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