Hardware_Design_2022

在本项目不同分支分别实现了57条指令、单Axi、Axi+二路组相联Cache的Cpu，最高频率50Mhz。

Name		Name	Last commit message	Last commit date
Latest commit History 54 Commits
BranchPredict.v		BranchPredict.v
Decode_Execute.v		Decode_Execute.v
Execute_Mem.v		Execute_Mem.v
Fetch_Decode.v		Fetch_Decode.v
Mem_WriteBack.v		Mem_WriteBack.v
README.md		README.md
alu.v		alu.v
aludec.v		aludec.v
branch_check.v		branch_check.v
cp0_reg.v		cp0_reg.v
datapath.v		datapath.v
defines2.vh		defines2.vh
div.v		div.v
exception.v		exception.v
hazard.v		hazard.v
hilo.v		hilo.v
instdec.v		instdec.v
jump_control.v		jump_control.v
maindec.v		maindec.v
mem_control.v		mem_control.v
mips.v		mips.v
mmu.v		mmu.v
mul.v		mul.v
mux4.v		mux4.v
mycpu_top.v		mycpu_top.v
pc.v		pc.v
regfile.v		regfile.v
signext.v		signext.v

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