[core] fixed a bug where clock tracks do not pass through at higher l…

…evel
lifpnc · Mar 7, 2023 · 11f09db · 11f09db
1 parent 50e201f
commit 11f09db
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/openfpga/src/annotation/append_clock_rr_graph.cpp b/openfpga/src/annotation/append_clock_rr_graph.cpp
@@ -515,8 +515,8 @@ static void add_rr_graph_block_clock_edges(
  size_t(itree), size_t(ilvl), size_t(ipin),
  DIRECTION_STRING[size_t(node_dir)]);
  VTR_ASSERT(rr_graph_view.valid_node(src_node));
- if (!clk_ntwk.is_last_level(itree, ilvl)) {
-  /* find the fan-out clock node through lookup */
+ /* find the fan-out clock node through lookup */
+ {
  size_t curr_edge_count = edge_count;
  for (RRNodeId des_node : find_clock_track2track_node(
  rr_graph_view, clk_ntwk, clk_rr_lookup, chan_type,