Merge branch 'sunxi-current' into sunxi

this marks the end of sunxi-current. from now on sunxi branch will
track upstream.

.checkpatch.conf

@@ -18,3 +18,6 @@
 
 # Not Linux, so we don't recommend usleep_range() over udelay()
 --ignore USLEEP_RANGE
+
+# Ignore networking block comment style
+--ignore NETWORKING_BLOCK_COMMENT_STYLE

CREDITS

@@ -124,6 +124,10 @@ N: James F. Dougherty
 E: [email protected]
 D: Port to the MOUSSE board
 
+N: Mike Dunn
+E: [email protected]
+D: Palmtreo680 board, docg4 nand flash driver
+
 N: Dave Ellis
 E: [email protected]
 D: EEPROM Speedup, SXNI855T port

MAINTAINERS

@@ -160,8 +160,9 @@ egnite GmbH <[email protected]>
 
 Dirk Eibach <[email protected]>
 
+	controlcenterd	P1022
 	devconcenter	PPC460EX
-	dlvision        PPC405EP
+	dlvision	PPC405EP
 	dlvision-10g	PPC405EP
 	gdppc440etx	PPC440EP/GR
 	intip		PPC460EX
@@ -664,6 +665,9 @@ Wolfgang Denk <[email protected]>
 	imx27lite	i.MX27
 	qong		i.MX31
 
+Mike Dunn <[email protected]>
+	palmtreo680	pxa270
+
 Kristoffer Ericson <[email protected]>
 
 	jornada	SA1110
@@ -675,9 +679,9 @@ Fabio Estevam <[email protected]>
 	mx31pdk		i.MX31
 	mx53ard		i.MX53
 	mx53smd		i.MX53
-	mx6qsabresd	i.MX6Q
+	mx6sabresd	i.MX6Q/DL
 	mx6qsabreauto	i.MX6Q
-	wandboard	i.MX6DL/S
+	wandboard	i.MX6DL/S/Q
 	mx6slevk	i.MX6SL
 
 Daniel Gorsulowski <[email protected]>
@@ -1143,10 +1147,6 @@ Stefan Roese <[email protected]>
 
 	vct_xxx		MIPS32 4Kc
 
-Xiangfu Liu <[email protected]>
-
-	qi_lb60		MIPS32 (XBurst Jz4740 SoC)
-
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:

MAKEALL

@@ -435,16 +435,11 @@ LIST_mips="		\
 ## MIPS Systems		(little endian)
 #########################################################################
 
-LIST_xburst_el="	\
-	qi_lb60		\
-"
-
 LIST_au1xx0_el="	\
 	dbau1550_el	\
 	pb1000		\
 "
 LIST_mips_el="			\
-	${LIST_xburst_el}	\
 	${LIST_au1xx0_el}	\
 "
 #########################################################################

Makefile

@@ -24,7 +24,7 @@
 VERSION = 2013
 PATCHLEVEL = 07
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION =
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
@@ -247,6 +247,7 @@ OBJS := $(addprefix $(obj),$(OBJS))
 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n)
 
 LIBS-y += lib/libgeneric.o
+LIBS-y += lib/rsa/librsa.o
 LIBS-y += lib/lzma/liblzma.o
 LIBS-y += lib/lzo/liblzo.o
 LIBS-y += lib/zlib/libz.o
@@ -753,6 +754,13 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE)
 	$(MAKE) -C $@ all
 endif	# config.mk
 
+# ARM relocations should all be R_ARM_RELATIVE.
+checkarmreloc: $(obj)u-boot
+	@if test "R_ARM_RELATIVE" != \
+		"`$(CROSS_COMPILE)readelf -r $< | cut -d ' ' -f 4 | grep R_ARM | sort -u`"; \
+		then echo "$< contains relocations other than \
+		R_ARM_RELATIVE"; false; fi
+
 $(VERSION_FILE):
 		@mkdir -p $(dir $(VERSION_FILE))
 		@( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \
@@ -836,7 +844,8 @@ clean:
 	       $(obj)tools/mksunxiboot					  \
 	       $(obj)tools/mxsboot					  \
 	       $(obj)tools/ncb		   $(obj)tools/ubsha1		  \
-	       $(obj)tools/kernel-doc/docproc
+	       $(obj)tools/kernel-doc/docproc				  \
+	       $(obj)tools/proftool
 	@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}	  \
 	       $(obj)board/matrix_vision/*/bootscript.img		  \
 	       $(obj)board/voiceblue/eeprom 				  \

README

@@ -413,11 +413,22 @@ The following options need to be configured:
 		See Freescale App Note 4493 for more information about
 		this erratum.
 
+		CONFIG_A003399_NOR_WORKAROUND
+		Enables a workaround for IFC erratum A003399. It is only
+		requred during NOR boot.
+
 		CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
 
 		This is the value to write into CCSR offset 0x18600
 		according to the A004510 workaround.
 
+		CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
+		This value denotes start offset of M2 memory
+		which is directly connected to the DSP core.
+
+		CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
+		This value denotes start offset of DSP CCSR space.
+
 - Generic CPU options:
 		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
 
@@ -843,7 +854,7 @@ The following options need to be configured:
 		CONFIG_CMD_FDOS		* Dos diskette Support
 		CONFIG_CMD_FLASH	  flinfo, erase, protect
 		CONFIG_CMD_FPGA		  FPGA device initialization support
-		CONFIG_CMD_FUSE		  Device fuse support
+		CONFIG_CMD_FUSE		* Device fuse support
 		CONFIG_CMD_GETTIME	* Get time since boot
 		CONFIG_CMD_GO		* the 'go' command (exec code)
 		CONFIG_CMD_GREPENV	* search environment
@@ -853,31 +864,32 @@ The following options need to be configured:
 		CONFIG_CMD_IDE		* IDE harddisk support
 		CONFIG_CMD_IMI		  iminfo
 		CONFIG_CMD_IMLS		  List all images found in NOR flash
-		CONFIG_CMD_IMLS_NAND	  List all images found in NAND flash
+		CONFIG_CMD_IMLS_NAND	* List all images found in NAND flash
 		CONFIG_CMD_IMMAP	* IMMR dump support
 		CONFIG_CMD_IMPORTENV	* import an environment
 		CONFIG_CMD_INI		* import data from an ini file into the env
 		CONFIG_CMD_IRQ		* irqinfo
 		CONFIG_CMD_ITEST	  Integer/string test of 2 values
 		CONFIG_CMD_JFFS2	* JFFS2 Support
 		CONFIG_CMD_KGDB		* kgdb
-		CONFIG_CMD_LDRINFO	  ldrinfo (display Blackfin loader)
+		CONFIG_CMD_LDRINFO	* ldrinfo (display Blackfin loader)
 		CONFIG_CMD_LINK_LOCAL	* link-local IP address auto-configuration
 					  (169.254.*.*)
 		CONFIG_CMD_LOADB	  loadb
 		CONFIG_CMD_LOADS	  loads
-		CONFIG_CMD_MD5SUM	  print md5 message digest
+		CONFIG_CMD_MD5SUM	* print md5 message digest
 					  (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
 		CONFIG_CMD_MEMINFO	* Display detailed memory information
 		CONFIG_CMD_MEMORY	  md, mm, nm, mw, cp, cmp, crc, base,
 					  loop, loopw
-		CONFIG_CMD_MEMTEST	  mtest
+		CONFIG_CMD_MEMTEST	* mtest
 		CONFIG_CMD_MISC		  Misc functions like sleep etc
 		CONFIG_CMD_MMC		* MMC memory mapped support
 		CONFIG_CMD_MII		* MII utility commands
 		CONFIG_CMD_MTDPARTS	* MTD partition support
 		CONFIG_CMD_NAND		* NAND support
 		CONFIG_CMD_NET		  bootp, tftpboot, rarpboot
+		CONFIG_CMD_NFS		  NFS support
 		CONFIG_CMD_PCA953X	* PCA953x I2C gpio commands
 		CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
 		CONFIG_CMD_PCI		* pciinfo
@@ -896,7 +908,7 @@ The following options need to be configured:
 		CONFIG_CMD_SETGETDCR	  Support for DCR Register access
 					  (4xx only)
 		CONFIG_CMD_SF		* Read/write/erase SPI NOR flash
-		CONFIG_CMD_SHA1SUM	  print sha1 memory digest
+		CONFIG_CMD_SHA1SUM	* print sha1 memory digest
 					  (requires CONFIG_CMD_MEMORY)
 		CONFIG_CMD_SOFTSWITCH	* Soft switch setting command for BF60x
 		CONFIG_CMD_SOURCE	  "source" command Support
@@ -908,6 +920,7 @@ The following options need to be configured:
 		CONFIG_CMD_USB		* USB support
 		CONFIG_CMD_CDP		* Cisco Discover Protocol support
 		CONFIG_CMD_MFSL		* Microblaze FSL support
+		CONFIG_CMD_XIMG		  Load part of Multi Image
 
 
 		EXAMPLE: If you want all functions except of network
@@ -1225,6 +1238,9 @@ The following options need to be configured:
 			CONFIG_TPM_TIS_I2C_BURST_LIMITATION
 			Define the burst count bytes upper limit
 
+		CONFIG_TPM_ATMEL_TWI
+		Support for Atmel TWI TPM device. Requires I2C support.
+
 		CONFIG_TPM_TIS_LPC
 		Support for generic parallel port TPM devices. Only one device
 		per system is supported at this time.
@@ -1234,6 +1250,20 @@ The following options need to be configured:
 			to. Contemporary x86 systems usually map it at
 			0xfed40000.
 
+		CONFIG_CMD_TPM
+		Add tpm monitor functions.
+		Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
+		provides monitor access to authorized functions.
+
+		CONFIG_TPM
+		Define this to enable the TPM support library which provides
+		functional interfaces to some TPM commands.
+		Requires support for a TPM device.
+
+		CONFIG_TPM_AUTH_SESSIONS
+		Define this to enable authorized functions in the TPM library.
+		Requires CONFIG_TPM and CONFIG_SHA1.
+
 - USB Support:
 		At the moment only the UHCI host controller is
 		supported (PIP405, MIP405, MPC5200); define
@@ -1379,6 +1409,12 @@ The following options need to be configured:
 		CONFIG_DFU_NAND
 		This enables support for exposing NAND devices via DFU.
 
+		CONFIG_SYS_DFU_DATA_BUF_SIZE
+		Dfu transfer uses a buffer before writing data to the
+		raw storage device. Make the size (in bytes) of this buffer
+		configurable. The size of this buffer is also configurable
+		through the "dfu_bufsiz" environment variable.
+
 		CONFIG_SYS_DFU_MAX_FILE_SIZE
 		When updating files rather than the raw storage device,
 		we use a static buffer to copy the file into and then write
@@ -1432,6 +1468,11 @@ CBFS (Coreboot Filesystem) support
 		Export function i8042_kbd_init, i8042_tstc and i8042_getc
 		for cfb_console. Supports cursor blinking.
 
+		CONFIG_CROS_EC_KEYB
+		Enables a Chrome OS keyboard using the CROS_EC interface.
+		This uses CROS_EC to communicate with a second microcontroller
+		which provides key scans on request.
+
 - Video support:
 		CONFIG_VIDEO
 
@@ -1624,14 +1665,6 @@ CBFS (Coreboot Filesystem) support
 			=> vertically centered image
 			   at x = dspWidth - bmpWidth - 9
 
-		CONFIG_SPLASH_SCREEN_PREPARE
-
-		If this option is set then the board_splash_screen_prepare()
-		function, which must be defined in your code, is called as part
-		of the splash screen display sequence. It gives the board an
-		opportunity to prepare the splash image data before it is
-		processed and sent to the frame buffer by U-Boot.
-
 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
 
 		If this option is set, additionally to standard BMP
@@ -2509,6 +2542,11 @@ CBFS (Coreboot Filesystem) support
 		Define this option to include a destructive SPI flash
 		test ('sf test').
 
+		CONFIG_SPI_FLASH_BAR		Ban/Extended Addr Reg
+
+		Define this option to use the Bank addr/Extended addr
+		support on SPI flashes which has size > 16Mbytes.
+
 - SystemACE Support:
 		CONFIG_SYSTEMACE
 
@@ -2560,6 +2598,16 @@ CBFS (Coreboot Filesystem) support
 		Note: There is also a sha1sum command, which should perhaps
 		be deprecated in favour of 'hash sha1'.
 
+- Signing support:
+		CONFIG_RSA
+
+		This enables the RSA algorithm used for FIT image verification
+		in U-Boot. See doc/uImage/signature for more information.
+
+		The signing part is build into mkimage regardless of this
+		option.
+
+
 - Show boot progress:
 		CONFIG_SHOW_BOOT_PROGRESS
 
@@ -2784,6 +2832,11 @@ FIT uImage format:
 		most specific compatibility entry of U-Boot's fdt's root node.
 		The order of entries in the configuration's fdt is ignored.
 
+		CONFIG_FIT_SIGNATURE
+		This option enables signature verification of FIT uImages,
+		using a hash signed and verified using RSA. See
+		doc/uImage.FIT/signature.txt for more details.
+
 - Standalone program support:
 		CONFIG_STANDALONE_LOAD_ADDR
 
@@ -3022,6 +3075,14 @@ FIT uImage format:
 		CONFIG_SPL_LIBGENERIC_SUPPORT
 		Support for lib/libgeneric.o in SPL binary
 
+		CONFIG_SPL_ENV_SUPPORT
+		Support for the environment operating in SPL binary
+
+		CONFIG_SPL_NET_SUPPORT
+		Support for the net/libnet.o in SPL binary.
+		It conflicts with SPL env from storage medium specified by
+		CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE
+
 		CONFIG_SPL_PAD_TO
 		Image offset to which the SPL should be padded before appending
 		the SPL payload. By default, this is defined as
@@ -3964,6 +4025,9 @@ Low Level (hardware related) configuration options:
 - CONFIG_SRIO2:
 		Board has SRIO 2 port available
 
+- CONFIG_SRIO_PCIE_BOOT_MASTER
+		Board can support master function for Boot from SRIO and PCIE
+
 - CONFIG_SYS_SRIOn_MEM_VIRT:
 		Virtual Address of SRIO port 'n' memory region
 
@@ -4074,6 +4138,11 @@ Low Level (hardware related) configuration options:
 		that is executed before the actual U-Boot. E.g. when
 		compiling a NAND SPL.
 
+- CONFIG_SYS_MPC85XX_NO_RESETVEC
+		Only for 85xx systems. If this variable is specified, the section
+		.resetvec is not kept and the section .bootpg is placed in the
+		previous 4k of the .text section.
+
 - CONFIG_ARCH_MAP_SYSMEM
 		Generally U-Boot (and in particular the md command) uses
 		effective address. It is therefore not necessary to regard

arch/arm/config.mk

@@ -109,3 +109,8 @@ ifeq ($(GAS_BUG_12532),y)
 PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
 endif
 endif
+
+# check that only R_ARM_RELATIVE relocations are generated
+ifneq ($(CONFIG_SPL_BUILD),y)
+ALL-y	+= checkarmreloc
+endif

arch/arm/cpu/arm920t/ep93xx/u-boot.lds

@@ -31,6 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
+		*(.__image_copy_start)
 	  arch/arm/cpu/arm920t/start.o	(.text*)
 		/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
 	  . = 0x1000;
@@ -56,7 +57,10 @@ SECTIONS
 
 	. = ALIGN(4);
 
-	__image_copy_end = .;
+	.image_copy_end :
+	{
+		*(.__image_copy_end)
+	}
 
 	__bss_start = .;
 	.bss : { *(.bss*) }