Skip to content

Commit

Permalink
Implement simd bitmask instructions (WebAssembly#1530)
Browse files Browse the repository at this point in the history
  • Loading branch information
binji authored Aug 31, 2020
1 parent ca7890a commit c3b9c32
Show file tree
Hide file tree
Showing 10 changed files with 631 additions and 529 deletions.
3 changes: 3 additions & 0 deletions src/binary-reader.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1189,6 +1189,9 @@ Result BinaryReader::ReadFunctionBody(Offset end_offset) {
case Opcode::I8X16AnyTrue:
case Opcode::I16X8AnyTrue:
case Opcode::I32X4AnyTrue:
case Opcode::I8X16Bitmask:
case Opcode::I16X8Bitmask:
case Opcode::I32X4Bitmask:
case Opcode::I8X16AllTrue:
case Opcode::I16X8AllTrue:
case Opcode::I32X4AllTrue:
Expand Down
16 changes: 16 additions & 0 deletions src/interp/interp.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1497,6 +1497,7 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {

case O::I8X16Neg: return DoSimdUnop(IntNeg<u8>);
case O::I8X16AnyTrue: return DoSimdIsTrue<u8x16, 1>();
case O::I8X16Bitmask: return DoSimdBitmask<s8x16>();
case O::I8X16AllTrue: return DoSimdIsTrue<u8x16, 16>();
case O::I8X16Shl: return DoSimdShift(IntShl<u8>);
case O::I8X16ShrS: return DoSimdShift(IntShr<s8>);
Expand All @@ -1514,6 +1515,7 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {

case O::I16X8Neg: return DoSimdUnop(IntNeg<u16>);
case O::I16X8AnyTrue: return DoSimdIsTrue<u16x8, 1>();
case O::I16X8Bitmask: return DoSimdBitmask<s16x8>();
case O::I16X8AllTrue: return DoSimdIsTrue<u16x8, 8>();
case O::I16X8Shl: return DoSimdShift(IntShl<u16>);
case O::I16X8ShrS: return DoSimdShift(IntShr<s16>);
Expand All @@ -1532,6 +1534,7 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {

case O::I32X4Neg: return DoSimdUnop(IntNeg<u32>);
case O::I32X4AnyTrue: return DoSimdIsTrue<u32x4, 1>();
case O::I32X4Bitmask: return DoSimdBitmask<s32x4>();
case O::I32X4AllTrue: return DoSimdIsTrue<u32x4, 4>();
case O::I32X4Shl: return DoSimdShift(IntShl<u32>);
case O::I32X4ShrS: return DoSimdShift(IntShr<s32>);
Expand Down Expand Up @@ -2022,6 +2025,19 @@ RunResult Thread::DoSimdIsTrue() {
return RunResult::Ok;
}

template <typename S>
RunResult Thread::DoSimdBitmask() {
auto val = Pop<S>();
u32 result = 0;
for (u8 i = 0; i < S::lanes; ++i) {
if (val.v[i] < 0) {
result |= 1 << i;
}
}
Push(result);
return RunResult::Ok;
}

template <typename R, typename T>
RunResult Thread::DoSimdShift(BinopFunc<R, T> f) {
using ST = typename Simd128<T>::Type;
Expand Down
2 changes: 2 additions & 0 deletions src/interp/interp.h
Original file line number Diff line number Diff line change
Expand Up @@ -1129,6 +1129,8 @@ class Thread : public Object {
RunResult DoSimdBitSelect();
template <typename S, u8 count>
RunResult DoSimdIsTrue();
template <typename S>
RunResult DoSimdBitmask();
template <typename R, typename T>
RunResult DoSimdShift(BinopFunc<R, T>);
template <typename S, typename T>
Expand Down
3 changes: 3 additions & 0 deletions src/interp/istream.cc
Original file line number Diff line number Diff line change
Expand Up @@ -154,6 +154,7 @@ Instr Istream::Read(Offset* offset) const {
case Opcode::F64X2Sqrt:
case Opcode::I16X8AllTrue:
case Opcode::I16X8AnyTrue:
case Opcode::I16X8Bitmask:
case Opcode::I16X8Neg:
case Opcode::I16X8Splat:
case Opcode::I16X8WidenHighI8X16S:
Expand All @@ -178,6 +179,7 @@ Instr Istream::Read(Offset* offset) const {
case Opcode::I32WrapI64:
case Opcode::I32X4AllTrue:
case Opcode::I32X4AnyTrue:
case Opcode::I32X4Bitmask:
case Opcode::I32X4Neg:
case Opcode::I32X4Splat:
case Opcode::I32X4TruncSatF32X4S:
Expand Down Expand Up @@ -208,6 +210,7 @@ Instr Istream::Read(Offset* offset) const {
case Opcode::I64X2Splat:
case Opcode::I8X16AllTrue:
case Opcode::I8X16AnyTrue:
case Opcode::I8X16Bitmask:
case Opcode::I8X16Neg:
case Opcode::I8X16Splat:
case Opcode::RefIsNull:
Expand Down
3 changes: 3 additions & 0 deletions src/lexer-keywords.txt
Original file line number Diff line number Diff line change
Expand Up @@ -166,6 +166,7 @@ i16x8.add, TokenType::Binary, Opcode::I16X8Add
i16x8.all_true, TokenType::Unary, Opcode::I16X8AllTrue
i16x8.any_true, TokenType::Unary, Opcode::I16X8AnyTrue
i16x8.avgr_u, TokenType::Binary, Opcode::I16X8AvgrU
i16x8.bitmask, TokenType::Unary, Opcode::I16X8Bitmask
i16x8.eq, TokenType::Compare, Opcode::I16X8Eq
i16x8.extract_lane_s, TokenType::SimdLaneOp, Opcode::I16X8ExtractLaneS
i16x8.extract_lane_u, TokenType::SimdLaneOp, Opcode::I16X8ExtractLaneU
Expand Down Expand Up @@ -283,6 +284,7 @@ i32x4.abs, TokenType::Unary, Opcode::I32X4Abs
i32x4.add, TokenType::Binary, Opcode::I32X4Add
i32x4.all_true, TokenType::Unary, Opcode::I32X4AllTrue
i32x4.any_true, TokenType::Unary, Opcode::I32X4AnyTrue
i32x4.bitmask, TokenType::Unary, Opcode::I32X4Bitmask
i32x4.eq, TokenType::Compare, Opcode::I32X4Eq
i32x4.extract_lane, TokenType::SimdLaneOp, Opcode::I32X4ExtractLane
i32x4.ge_s, TokenType::Compare, Opcode::I32X4GeS
Expand Down Expand Up @@ -429,6 +431,7 @@ i8x16.add, TokenType::Binary, Opcode::I8X16Add
i8x16.all_true, TokenType::Unary, Opcode::I8X16AllTrue
i8x16.any_true, TokenType::Unary, Opcode::I8X16AnyTrue
i8x16.avgr_u, TokenType::Binary, Opcode::I8X16AvgrU
i8x16.bitmask, TokenType::Unary, Opcode::I8X16Bitmask
i8x16.eq, TokenType::Compare, Opcode::I8X16Eq
i8x16.extract_lane_s, TokenType::SimdLaneOp, Opcode::I8X16ExtractLaneS
i8x16.extract_lane_u, TokenType::SimdLaneOp, Opcode::I8X16ExtractLaneU
Expand Down
3 changes: 3 additions & 0 deletions src/opcode.cc
Original file line number Diff line number Diff line change
Expand Up @@ -225,6 +225,9 @@ bool Opcode::IsEnabled(const Features& features) const {
case Opcode::I8X16AnyTrue:
case Opcode::I16X8AnyTrue:
case Opcode::I32X4AnyTrue:
case Opcode::I8X16Bitmask:
case Opcode::I16X8Bitmask:
case Opcode::I32X4Bitmask:
case Opcode::I8X16AllTrue:
case Opcode::I16X8AllTrue:
case Opcode::I32X4AllTrue:
Expand Down
3 changes: 3 additions & 0 deletions src/opcode.def
Original file line number Diff line number Diff line change
Expand Up @@ -347,6 +347,7 @@ WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0x60, I8X16Abs, "i8x16.abs", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0x61, I8X16Neg, "i8x16.neg", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x62, I8X16AnyTrue, "i8x16.any_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x63, I8X16AllTrue, "i8x16.all_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x64, I8X16Bitmask, "i8x16.bitmask", "")
WABT_OPCODE(V128, V128, V128, ___, 0, 0xfd, 0x65, I8X16NarrowI16X8S, "i8x16.narrow_i16x8_s", "")
WABT_OPCODE(V128, V128, V128, ___, 0, 0xfd, 0x66, I8X16NarrowI16X8U, "i8x16.narrow_i16x8_u", "")
WABT_OPCODE(V128, V128, I32, ___, 0, 0xfd, 0x6b, I8X16Shl, "i8x16.shl", "")
Expand All @@ -367,6 +368,7 @@ WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0x80, I16X8Abs, "i16x8.abs", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0x81, I16X8Neg, "i16x8.neg", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x82, I16X8AnyTrue, "i16x8.any_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x83, I16X8AllTrue, "i16x8.all_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0x84, I16X8Bitmask, "i16x8.bitmask", "")
WABT_OPCODE(V128, V128, V128, ___, 0, 0xfd, 0x85, I16X8NarrowI32X4S, "i16x8.narrow_i32x4_s", "")
WABT_OPCODE(V128, V128, V128, ___, 0, 0xfd, 0x86, I16X8NarrowI32X4U, "i16x8.narrow_i32x4_u", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0x87, I16X8WidenLowI8X16S, "i16x8.widen_low_i8x16_s", "")
Expand All @@ -392,6 +394,7 @@ WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0xa0, I32X4Abs, "i32x4.abs", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0xa1, I32X4Neg, "i32x4.neg", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0xa2, I32X4AnyTrue, "i32x4.any_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0xa3, I32X4AllTrue, "i32x4.all_true", "")
WABT_OPCODE(I32, V128, ___, ___, 0, 0xfd, 0xa4, I32X4Bitmask, "i32x4.bitmask", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0xa7, I32X4WidenLowI16X8S, "i32x4.widen_low_i16x8_s", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0xa8, I32X4WidenHighI16X8S, "i32x4.widen_high_i16x8_s", "")
WABT_OPCODE(V128, V128, ___, ___, 0, 0xfd, 0xa9, I32X4WidenLowI16X8U, "i32x4.widen_low_i16x8_u", "")
Expand Down
Loading

0 comments on commit c3b9c32

Please sign in to comment.