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  1. AXI2APB-Bridge-Design-and-Verification AXI2APB-Bridge-Design-and-Verification Public

    In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the preferred AXI bus will be axi4-lite and the APB bus will be APB3. …

    SystemVerilog 15

  2. AXI2APB-Bridge-debug-using-JTAG2AXI-Master AXI2APB-Bridge-debug-using-JTAG2AXI-Master Public

    In this repository, the hardware tests for the RTL code that you can find in my profile ("AXI2APB-Bridge-Design-and-Verification") will be tested using the JTAG to AXI Master IP Core provided by XI…

    Tcl 3

  3. Line-Follower-using-STM32 Line-Follower-using-STM32 Public

    Line Follower using STM32

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  4. APB-Slave-Verification APB-Slave-Verification Public

    In this respiratory you'll be seeing the design and verification of the APB Slave protocol using SV Assertions and Coverage Directives and function coverage including covergroups and cross coverage.

    SystemVerilog 1

  5. Brain-MRI-Image-Classification-using-kernel-SVM Brain-MRI-Image-Classification-using-kernel-SVM Public

    MATLAB

  6. apis_anatolia apis_anatolia Public

    Forked from mbaykenar/apis_anatolia

    "Apis Anatolia" YouTube kanalında yayınlanan VHDL ve FPGA dersleri ile ilgili kodları içermektedir.

    VHDL