arm: mvebu: Define all options for A38x BOOT_FROM_* macros

Disassembling A385 BootROM binary reveal how BootROM interprets strapping
pins for Boot Device Mode. All possible options are:

0x00..0x07 -> Parallel NOR
0x08..0x15 -> Parallel NAND
0x16..0x17 -> Parallel NOR
0x18..0x25 -> Parallel NAND
0x26..0x27 -> SPI NAND
0x28..0x29 -> UART xmodem
0x2a..0x2b -> SATA
0x2c..0x2d -> PCI Express
0x2e..0x2f -> Parallel NOR
0x30..0x31 -> SD / eMMC
0x32..0x39 -> SPI NOR
0x3a..0x3c -> Parallel NOR
0x3d..0x3e -> UART debug console
0x3f       -> Invalid

Note that Boot Device Mode Options in A38x Hardware Specifications is
incomplete.

Signed-off-by: Pali Rohár <[email protected]>
Tested-by: Tony Dinh <[email protected]>
Tested-by: Martin Rowe <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>

arch/arm/mach-mvebu/include/mach/soc.h

@@ -160,11 +160,14 @@
 #define BOOT_DEV_SEL_OFFS	4
 #define BOOT_DEV_SEL_MASK	(0x3f << BOOT_DEV_SEL_OFFS)
 
-#define BOOT_FROM_NAND(x)	(x == 0x0A)
-#define BOOT_FROM_SATA(x)	(x == 0x2A)
-#define BOOT_FROM_UART(x)	(x == 0x28)
-#define BOOT_FROM_SPI(x)	(x == 0x32)
+#define BOOT_FROM_NOR(x)	((x >= 0x00 && x <= 0x07) || x == 0x16 || x == 0x17 || x == 0x2E || x == 0x2F || (x >= 0x3A && x <= 0x3C))
+#define BOOT_FROM_NAND(x)	((x >= 0x08 && x <= 0x15) || (x >= 0x18 && x <= 0x25))
+#define BOOT_FROM_SPINAND(x)	(x == 0x26 || x == 0x27)
+#define BOOT_FROM_UART(x)	(x == 0x28 || x == 0x29)
+#define BOOT_FROM_SATA(x)	(x == 0x2A || x == 0x2B)
+#define BOOT_FROM_PEX(x)	(x == 0x2C || x == 0x2D)
 #define BOOT_FROM_MMC(x)	(x == 0x30 || x == 0x31)
+#define BOOT_FROM_SPI(x)	(x >= 0x32 && x <= 0x39)
 
 #define CFG_SYS_TCLK		((readl(CFG_SAR_REG) & BIT(15)) ? \
 				 200000000 : 250000000)