RISC-V: allow building scalable RVV support with GCC, LLVM 16 support

mychaint · Apr 5, 2023 · b12c145 · b12c145
1 parent 2b32eee
commit b12c145
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Showing 6 changed files with 25,475 additions and 79 deletions.
diff --git a/cmake/checks/cpu_rvv.cpp b/cmake/checks/cpu_rvv.cpp
@@ -6,12 +6,17 @@
 #endif
 
 #if defined CV_RVV
+#if defined(__riscv_v_intrinsic) &&  __riscv_v_intrinsic>10999
+#define vreinterpret_v_u64m1_u8m1 __riscv_vreinterpret_v_u64m1_u8m1
+#define vle64_v_u64m1 __riscv_vle64_v_u64m1
+#define vle32_v_f32m1 __riscv_vle32_v_f32m1
+#define vfmv_f_s_f32m1_f32 __riscv_vfmv_f_s_f32m1_f32
+#endif
 int test()
 {
     const float src[] = { 0.0f, 0.0f, 0.0f, 0.0f };
     uint64_t ptr[2] = {0x0908060504020100, 0xFFFFFFFF0E0D0C0A};
     vuint8m1_t a = vreinterpret_v_u64m1_u8m1(vle64_v_u64m1(ptr, 2));
-    //vuint8m1_t a = (vuint8m1_t)vle64_v_u64m1(ptr, 2);
     vfloat32m1_t val = vle32_v_f32m1((const float*)(src), 4);
     return (int)vfmv_f_s_f32m1_f32(val);
 }

diff --git a/modules/core/include/opencv2/core/hal/intrin_rvv.hpp b/modules/core/include/opencv2/core/hal/intrin_rvv.hpp
@@ -10,6 +10,15 @@
 
 #include <algorithm>
 
+// RVV intrinsics have been renamed in version 0.11, so we need to include
+// compatibility headers:
+// https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/master/auto-generated/rvv-v0p10-compatible-headers
+#if defined(__riscv_v_intrinsic) &&  __riscv_v_intrinsic>10999
+#include "intrin_rvv_010_compat_non-policy.hpp"
+#include "intrin_rvv_010_compat_overloaded-non-policy.hpp"
+#endif
+
+
 // Building for T-Head C906 core with RVV 0.7.1 using toolchain
 // https://github.com/T-head-Semi/xuantie-gnu-toolchain
 // with option '-march=rv64gcv0p7'