genclk

Signed-off-by: James Cherry <[email protected]>
nchuan · Nov 17, 2022 · 9bdd01f · 9bdd01f
1 parent 48d6e00
commit 9bdd01f
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Showing 16 changed files with 212 additions and 542 deletions.
diff --git a/doc/OpenSTA.odt b/doc/OpenSTA.odt
diff --git a/doc/OpenSTA.pdf b/doc/OpenSTA.pdf
diff --git a/include/sta/Clock.hh b/include/sta/Clock.hh
@@ -105,8 +105,6 @@ public:
   Clock *masterClk() const { return master_clk_; }
   bool masterClkInfered() const { return master_clk_infered_; }
   void setInferedMasterClk(Clock *master_clk);
-  Pin *pllOut() const { return pll_out_; }
-  Pin *pllFdbk() const { return pll_fdbk_; }
   int divideBy() const { return divide_by_; }
   int multiplyBy() const { return multiply_by_; }
   float dutyCycle() const { return duty_cycle_; }
@@ -138,8 +136,6 @@ protected:
 			bool add_to_pins,
 			Pin *src_pin,
 			Clock *master_clk,
-			Pin *pll_out,
-			Pin *pll_fdbk,
 			int divide_by,
 			int multiply_by,
 			float duty_cycle,
@@ -165,8 +161,6 @@ protected:
   bool add_to_pins_;
   // Hierarchical pins in pins_ become driver pins through the pin.
   PinSet leaf_pins_;
-  Pin *pll_out_;
-  Pin *pll_fdbk_;
   float period_;
   FloatSeq *waveform_;
   bool waveform_valid_;

diff --git a/include/sta/Sdc.hh b/include/sta/Sdc.hh
@@ -348,8 +348,6 @@ public:
 				    bool add_to_pins,
 				    Pin *src_pin,
 				    Clock *master_clk,
-				    Pin *pll_out,
-				    Pin *pll_fdbk,
 				    int divide_by,
 				    int multiply_by,
 				    float duty_cycle,

diff --git a/include/sta/Sta.hh b/include/sta/Sta.hh
@@ -277,8 +277,6 @@ public:
 			  bool add_to_pins,
 			  Pin *src_pin,
 			  Clock *master_clk,
-			  Pin *pll_out,
-			  Pin *pll_fdbk,
 			  int divide_by,
 			  int multiply_by,
 			  float duty_cycle,

diff --git a/messages.txt b/messages.txt
diff --git a/sdc/Clock.cc b/sdc/Clock.cc
@@ -36,8 +36,6 @@ Clock::Clock(const char *name,
 	     int index) :
   name_(stringCopy(name)),
   add_to_pins_(false),
-  pll_out_(nullptr),
-  pll_fdbk_(nullptr),
   period_(0.0),
   waveform_(nullptr),
   waveform_valid_(false),
@@ -312,8 +310,6 @@ Clock::initGeneratedClk(PinSet *pins,
 			bool add_to_pins,
 			Pin *src_pin,
 			Clock *master_clk,
-			Pin *pll_out,
-			Pin *pll_fdbk,
 			int divide_by,
 			int multiply_by,
 			float duty_cycle,
@@ -332,8 +328,6 @@ Clock::initGeneratedClk(PinSet *pins,
   master_clk_ = master_clk;
   master_clk_infered_ = false;
   waveform_valid_ = false;
-  pll_out_= pll_out;
-  pll_fdbk_ = pll_fdbk;
   divide_by_ = divide_by;
   multiply_by_ = multiply_by;
   duty_cycle_ = duty_cycle;

diff --git a/sdc/Sdc.cc b/sdc/Sdc.cc
@@ -993,8 +993,6 @@ Sdc::makeGeneratedClock(const char *name,
 			bool add_to_pins,
 			Pin *src_pin,
 			Clock *master_clk,
-			Pin *pll_out,
-			Pin *pll_fdbk,
 			int divide_by,
 			int multiply_by,
 			float duty_cycle,
@@ -1015,7 +1013,6 @@ Sdc::makeGeneratedClock(const char *name,
     clock_name_map_[clk->name()] = clk;
   }
   clk->initGeneratedClk(pins, add_to_pins, src_pin, master_clk,
-			pll_out, pll_fdbk,
 			divide_by, multiply_by, duty_cycle,
 			invert, combinational,
 			edges, edge_shifts, propagate_all_clks_,

diff --git a/sdc/WriteSdc.cc b/sdc/WriteSdc.cc
@@ -433,16 +433,6 @@ WriteSdc::writeGeneratedClock(Clock *clk) const
     gzprintf(stream_, " -master_clock ");
     writeGetClock(master);
   }
-  Pin *pll_out = clk->pllOut();
-  if (pll_out) {
-    gzprintf(stream_, " -pll_out ");
-    writeGetPin(pll_out, true);
-  }
-  Pin *pll_fdbk = clk->pllFdbk();
-  if (pll_fdbk) {
-    gzprintf(stream_, " -pll_feedback ");
-    writeGetPin(pll_fdbk, false);
-  }
   if (clk->combinational())
     gzprintf(stream_, " -combinational");
   int divide_by = clk->divideBy();