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  1. small_soc small_soc Public

    The SoC system has high efficiency 8-bit register cells and has custom RISC instruction set architecture. The main components of this designed architecture are CPU, memory system, timer units and I…

    VHDL 2 1

  2. edge_detector edge_detector Public

    This sobel edge detector hardware design consists of two block memories and the main module, the sobel execution unit. Data can be loaded from the input memory, and the resulting image can be read …

    SystemVerilog 1