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1. SDN_mininet SDN_mininet Public

   This is a repository for SDN-based implementation of MPLS network with OVS and OpenFlow, and Network Virtualization using OpenDayLight controller for remote approaches

   Python 1 1

2. LAN_ZYNQ LAN_ZYNQ Public

   Launching a UDP&TCP server in a LAN network using ZYNQ-7020 Processing System(PS)

   C 1

3. Multicycle_RISCV Multicycle_RISCV Public

   Implementation of a multi-cycle RISC-V processor for executing a RISC-V assembly code

   Verilog 2

4. Full_Bridge_Inverter Full_Bridge_Inverter Public

   PCB document of a 2-layer Full Bridge Inverter using IR2113 and IR2110 ICs

   1

5. ONT_SysVerilog ONT_SysVerilog Public

   Software-Based Optical Network SDH traffic generator written in SystemVerilog

   SystemVerilog

6. Spartan3_FPGA Spartan3_FPGA Public

   PCB document of Xilinx Spartan-3 FPGA development board

   1