GitHub - pedrofausto/Verilog-MIPSProcessor: Full implementation of a modifed MIPS processor in Verilog.

Full implementation of a modifed MIPS processor in Verilog.

Includes:

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
Test_program		Test_program
work		work
README.md		README.md
arithmetic_logic_unit.v		arithmetic_logic_unit.v
control_unit.v		control_unit.v
cpu.v		cpu.v
data_memory.v		data_memory.v
instruction_memory.v		instruction_memory.v
modelsim.ini		modelsim.ini
mux_2to1.v		mux_2to1.v
program.mips		program.mips
program1.mips		program1.mips
program_counter.v		program_counter.v
register_file.v		register_file.v
sign_extension.v		sign_extension.v
startsim.do		startsim.do
tb_CPU.v		tb_CPU.v
vsim.wlf		vsim.wlf

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