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arm64: dts: rockchip: add efuse node and info for RK1808 SoCs
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Change-Id: I5ab0c408e7db0cb12c002c3e52fd3ac57bcb5c21
Signed-off-by: Liang Chen <[email protected]>
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Liang Chen authored and rkhuangtao committed Jan 11, 2019
1 parent e7daa24 commit ae16222
Showing 1 changed file with 45 additions and 0 deletions.
45 changes: 45 additions & 0 deletions arch/arm64/boot/dts/rockchip/rk1808.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,9 @@
compatible = "operating-points-v2";
opp-shared;

nvmem-cells = <&cpu_leakage>;
nvmem-cell-names = "leakage";

opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <750000 750000 950000>;
Expand Down Expand Up @@ -105,6 +108,12 @@
interrupt-affinity = <&cpu0>, <&cpu1>;
};

cpuinfo {
compatible = "rockchip,cpuinfo";
nvmem-cells = <&efuse_id>, <&efuse_cpu_version>;
nvmem-cell-names = "id", "cpu-version";
};

gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
Expand Down Expand Up @@ -470,6 +479,36 @@
};
};

efuse: efuse@ff260000 {
compatible = "rockchip,rk1808-efuse";
reg = <0x0 0xff3b0000 0x0 0x50>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cru SCLK_EFUSE_NS>, <&cru PCLK_EFUSE>;
clock-names = "sclk_efuse", "pclk_efuse";
assigned-clocks = <&cru SCLK_EFUSE_NS>;
assigned-clock-rates = <24000000>;
rockchip,efuse-size = <0x20>;

/* Data cells */
efuse_id: id@7 {
reg = <0x07 0x10>;
};
cpu_leakage: cpu-leakage@17 {
reg = <0x17 0x1>;
};
logic_leakage: logic-leakage@18 {
reg = <0x18 0x1>;
};
npu_leakage: npu-leakage@19 {
reg = <0x19 0x1>;
};
efuse_cpu_version: cpu-version@1c {
reg = <0x1c 0x1>;
bits = <3 3>;
};
};

cru: clock-controller@ff350000 {
compatible = "rockchip,rk1808-cru";
reg = <0x0 0xff350000 0x0 0x5000>;
Expand Down Expand Up @@ -1201,6 +1240,9 @@
dmc_opp_table: dmc-opp-table {
compatible = "operating-points-v2";

nvmem-cells = <&logic_leakage>;
nvmem-cell-names = "leakage";

opp-194000000 {
opp-hz = /bits/ 64 <194000000>;
opp-microvolt = <800000>;
Expand Down Expand Up @@ -1503,6 +1545,9 @@
npu_opp_table: npu-opp-table {
compatible = "operating-points-v2";

nvmem-cells = <&npu_leakage>;
nvmem-cell-names = "leakage";

opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <750000 750000 950000>;
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