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Verilator/SDL Screen Array Unchecked (C++)
bug
Something isn't working
#90
opened Feb 7, 2022 by
WillGreen
updated Feb 7, 2022
Triangle outline and fill not congruent
bug
Something isn't working
#111
opened Sep 9, 2022 by
WillGreen
updated Sep 9, 2022
Sub-Pixel Drawing Precision
enhancement
New feature or request
#113
opened Sep 10, 2022 by
WillGreen
updated Sep 10, 2022
Colour Index Latency Correction with bitmap_addr
bug
Something isn't working
#115
opened Sep 17, 2022 by
WillGreen
updated Oct 16, 2022
Remove Old Clock Gen Modules
enhancement
New feature or request
#123
opened Oct 23, 2022 by
WillGreen
updated Oct 23, 2022
Support SPRAM Framebuffer
enhancement
New feature or request
#133
opened Jan 3, 2023 by
WillGreen
updated Jan 30, 2023
Shared Triangle Edges
enhancement
New feature or request
#112
opened Sep 10, 2022 by
WillGreen
updated May 11, 2023
UART echo's back half the input
bug
Something isn't working
#131
opened Nov 27, 2022 by
eliquinox
updated Jun 19, 2023
Inconsistency between Verilog Maths and Python Fixed-Point Model
bug
Something isn't working
#167
opened Jun 27, 2023 by
WillGreen
updated Jun 27, 2023
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