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9 Open 23 Closed
9 Open 23 Closed
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Issues list

Inconsistency between Verilog Maths and Python Fixed-Point Model bug Something isn't working
#167 opened Jun 27, 2023 by WillGreen
@WillGreen
Support SPRAM Framebuffer enhancement New feature or request
#133 opened Jan 3, 2023 by WillGreen
2
UART echo's back half the input bug Something isn't working
#131 opened Nov 27, 2022 by eliquinox
@WillGreen
8
Remove Old Clock Gen Modules enhancement New feature or request
#123 opened Oct 23, 2022 by WillGreen
Colour Index Latency Correction with bitmap_addr bug Something isn't working
#115 opened Sep 17, 2022 by WillGreen
@WillGreen
1
Sub-Pixel Drawing Precision enhancement New feature or request
#113 opened Sep 10, 2022 by WillGreen
Shared Triangle Edges enhancement New feature or request
#112 opened Sep 10, 2022 by WillGreen
Triangle outline and fill not congruent bug Something isn't working
#111 opened Sep 9, 2022 by WillGreen
Verilator/SDL Screen Array Unchecked (C++) bug Something isn't working
#90 opened Feb 7, 2022 by WillGreen
ProTip! Adding no:label will show everything without a label.